From: Marek Olšák <marek.ol...@amd.com>
we don't use on-chip tess.
---
src/gallium/drivers/radeonsi/si_shader.c | 6 +++---
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 -----
2 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 5ca974e..ea1e8b3 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5533,21 +5533,21 @@ static void declare_streamout_params(struct
si_shader_context *ctx,
LLVMTypeRef *params, LLVMTypeRef i32,
unsigned *num_params)
{
int i;
/* Streamout SGPRs. */
if (so->num_outputs) {
if (ctx->type != PIPE_SHADER_TESS_EVAL)
params[ctx->param_streamout_config = (*num_params)++] =
i32;
else
- ctx->param_streamout_config = ctx->param_tess_offchip;
+ ctx->param_streamout_config = *num_params - 1;
params[ctx->param_streamout_write_index = (*num_params)++] =
i32;
}
/* A streamout buffer offset is loaded if the stride is non-zero. */
for (i = 0; i < 4; i++) {
if (!so->stride[i])
continue;
params[ctx->param_streamout_offset[i] = (*num_params)++] = i32;
}
@@ -5697,24 +5697,24 @@ static void create_function(struct si_shader_context
*ctx)
for (i = 0; i < 3; i++)
returns[num_returns++] = ctx->f32; /* VGPRs */
break;
case PIPE_SHADER_TESS_EVAL:
params[SI_PARAM_TCS_OFFCHIP_LAYOUT] = ctx->i32;
num_params = SI_PARAM_TCS_OFFCHIP_LAYOUT+1;
if (shader->key.as_es) {
params[ctx->param_oc_lds = num_params++] = ctx->i32;
- params[ctx->param_tess_offchip = num_params++] =
ctx->i32;
+ params[num_params++] = ctx->i32;
params[ctx->param_es2gs_offset = num_params++] =
ctx->i32;
} else {
- params[ctx->param_tess_offchip = num_params++] =
ctx->i32;
+ params[num_params++] = ctx->i32;
declare_streamout_params(ctx, &shader->selector->so,
params, ctx->i32, &num_params);
params[ctx->param_oc_lds = num_params++] = ctx->i32;
}
last_sgpr = num_params - 1;
/* VGPRs */
params[ctx->param_tes_u = num_params++] = ctx->f32;
params[ctx->param_tes_v = num_params++] = ctx->f32;
params[ctx->param_tes_rel_patch_id = num_params++] = ctx->i32;
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h
b/src/gallium/drivers/radeonsi/si_shader_internal.h
index d37a9e7..9055b4d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -114,25 +114,20 @@ struct si_shader_context {
int param_vs_prim_id;
int param_instance_id;
int param_vertex_index0;
int param_tes_u;
int param_tes_v;
int param_tes_rel_patch_id;
int param_tes_patch_id;
int param_es2gs_offset;
int param_oc_lds;
- /* Sets a bit if the dynamic HS control word was 0x80000000. The bit is
- * 0x800000 for VS, 0x1 for ES.
- */
- int param_tess_offchip;
-
LLVMTargetMachineRef tm;
unsigned invariant_load_md_kind;
unsigned range_md_kind;
unsigned uniform_md_kind;
unsigned fpmath_md_kind;
LLVMValueRef fpmath_md_2p5_ulp;
LLVMValueRef empty_md;
/* Preloaded descriptors. */
--
2.7.4
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