From: Xavi Zhang <xavi.zh...@amd.com> Signed-off-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/amd/addrlib/core/addrcommon.h | 9 ++++----- src/amd/addrlib/core/addrelemlib.h | 4 ++-- src/amd/addrlib/core/addrlib.h | 2 +- src/amd/addrlib/core/addrlib1.cpp | 16 ++++++++-------- src/amd/addrlib/core/addrlib1.h | 2 +- 5 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/src/amd/addrlib/core/addrcommon.h b/src/amd/addrlib/core/addrcommon.h index 9902eb1..8199f76 100644 --- a/src/amd/addrlib/core/addrcommon.h +++ b/src/amd/addrlib/core/addrcommon.h @@ -104,32 +104,31 @@ enum AddrChipFamily ADDR_CHIP_FAMILY_R7XX, ADDR_CHIP_FAMILY_R8XX, ADDR_CHIP_FAMILY_NI, ADDR_CHIP_FAMILY_SI, ADDR_CHIP_FAMILY_CI, ADDR_CHIP_FAMILY_VI, }; /** *************************************************************************************************** -* ADDR_CONFIG_FLAGS +* AddrConfigFlags * * @brief -* This structure is used to set addr configuration flags. +* This structure is used to set configuration flags. *************************************************************************************************** */ -union ADDR_CONFIG_FLAGS +union AddrConfigFlags { struct { - /// Clients do not need to set these flags except forceLinearAligned. - /// There flags are set up by AddrLib inside thru AddrInitGlobalParamsFromRegister + /// These flags are set up internally thru AddrLib::Create() based on ADDR_CREATE_FLAGS UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and /// output structure UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize diff --git a/src/amd/addrlib/core/addrelemlib.h b/src/amd/addrlib/core/addrelemlib.h index c302b3b..68dee2d 100644 --- a/src/amd/addrlib/core/addrelemlib.h +++ b/src/amd/addrlib/core/addrelemlib.h @@ -224,21 +224,21 @@ public: AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY, UINT_32* pBpp, UINT_32* pWidth, UINT_32* pHeight); /// Checks if depth and stencil are planar inside a tile BOOL_32 IsDepthStencilTilePlanar() { return (m_depthPlanarType == ADDR_DEPTH_PLANAR_R600) ? TRUE : FALSE; } /// Sets m_configFlags, copied from AddrLib - VOID SetConfigFlags(ADDR_CONFIG_FLAGS flags) + VOID SetConfigFlags(AddrConfigFlags flags) { m_configFlags = flags; } static BOOL_32 IsCompressed(AddrFormat format); static BOOL_32 IsBlockCompressed(AddrFormat format); static BOOL_32 IsExpand3x(AddrFormat format); protected: @@ -255,16 +255,16 @@ protected: AddrSurfaceSwap swap, ADDR_PIXEL_FORMATINFO* pInfo); static VOID SwapComps( UINT_32 c0, UINT_32 c1, ADDR_PIXEL_FORMATINFO* pInfo); private: UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM AddrDepthPlanarType m_depthPlanarType; - ADDR_CONFIG_FLAGS m_configFlags; ///< Copy of AddrLib's configFlags + AddrConfigFlags m_configFlags; ///< Copy of AddrLib's configFlags AddrLib* const m_pAddrLib; ///< Pointer to parent addrlib instance }; #endif diff --git a/src/amd/addrlib/core/addrlib.h b/src/amd/addrlib/core/addrlib.h index 4ba7c2d..9e46a82 100644 --- a/src/amd/addrlib/core/addrlib.h +++ b/src/amd/addrlib/core/addrlib.h @@ -242,21 +242,21 @@ protected: AddrChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h UINT_32 m_chipRevision; ///< Revision id from xxx_id.h UINT_32 m_version; ///< Current version // // Global parameters // - ADDR_CONFIG_FLAGS m_configFlags; ///< Global configuration flags. Note this is setup by + AddrConfigFlags m_configFlags; ///< Global configuration flags. Note this is setup by /// AddrLib instead of Client except forceLinearAligned UINT_32 m_pipes; ///< Number of pipes UINT_32 m_banks; ///< Number of banks /// For r800 this is MC_ARB_RAMCFG.NOOFBANK /// Keep it here to do default parameter calculation UINT_32 m_pipeInterleaveBytes; ///< Specifies the size of contiguous address space /// within each tiling pipe when making linear diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp index 0be7bc1..5e68f27 100644 --- a/src/amd/addrlib/core/addrlib1.cpp +++ b/src/amd/addrlib/core/addrlib1.cpp @@ -33,21 +33,21 @@ #include "addrinterface.h" #include "addrlib1.h" #include "addrcommon.h" /////////////////////////////////////////////////////////////////////////////////////////////////// // Static Const Member /////////////////////////////////////////////////////////////////////////////////////////////////// -const AddrTileModeFlags AddrLib1::m_modeFlags[ADDR_TM_COUNT] = +const AddrTileModeFlags AddrLib1::ModeFlags[ADDR_TM_COUNT] = {// T L 1 2 3 P Pr B {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_GENERAL {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_ALIGNED {1, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THIN1 {4, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THICK {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN1 {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN2 {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN4 {4, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THICK {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN1 @@ -1204,21 +1204,21 @@ ADDR_E_RETURNCODE AddrLib1::GetTileIndex( * @brief * Get tile mode thickness * * @return * Tile mode thickness *************************************************************************************************** */ UINT_32 AddrLib1::Thickness( AddrTileMode tileMode) ///< [in] tile mode { - return m_modeFlags[tileMode].thickness; + return ModeFlags[tileMode].thickness; } /////////////////////////////////////////////////////////////////////////////////////////////////// // CMASK/HTILE /////////////////////////////////////////////////////////////////////////////////////////////////// /** *************************************************************************************************** @@ -3363,104 +3363,104 @@ UINT_32 AddrLib1::HwlPostHandleBaseLvl3xPitch( * @brief * Check if the tile mode is macro tiled * * @return * TRUE if it is macro tiled (2D/2B/3D/3B) *************************************************************************************************** */ BOOL_32 AddrLib1::IsMacroTiled( AddrTileMode tileMode) ///< [in] tile mode { - return m_modeFlags[tileMode].isMacro; + return ModeFlags[tileMode].isMacro; } /** *************************************************************************************************** * AddrLib1::IsMacro3dTiled * * @brief * Check if the tile mode is 3D macro tiled * * @return * TRUE if it is 3D macro tiled *************************************************************************************************** */ BOOL_32 AddrLib1::IsMacro3dTiled( AddrTileMode tileMode) ///< [in] tile mode { - return m_modeFlags[tileMode].isMacro3d; + return ModeFlags[tileMode].isMacro3d; } /** *************************************************************************************************** * AddrLib1::IsMicroTiled * * @brief * Check if the tile mode is micro tiled * * @return * TRUE if micro tiled *************************************************************************************************** */ BOOL_32 AddrLib1::IsMicroTiled( AddrTileMode tileMode) ///< [in] tile mode { - return m_modeFlags[tileMode].isMicro; + return ModeFlags[tileMode].isMicro; } /** *************************************************************************************************** * AddrLib1::IsLinear * * @brief * Check if the tile mode is linear * * @return * TRUE if linear *************************************************************************************************** */ BOOL_32 AddrLib1::IsLinear( AddrTileMode tileMode) ///< [in] tile mode { - return m_modeFlags[tileMode].isLinear; + return ModeFlags[tileMode].isLinear; } /** *************************************************************************************************** * AddrLib1::IsPrtNoRotationTileMode * * @brief * Return TRUE if it is prt tile without rotation * @note * This function just used by CI *************************************************************************************************** */ BOOL_32 AddrLib1::IsPrtNoRotationTileMode( AddrTileMode tileMode) { - return m_modeFlags[tileMode].isPrtNoRotation; + return ModeFlags[tileMode].isPrtNoRotation; } /** *************************************************************************************************** * AddrLib1::IsPrtTileMode * * @brief * Return TRUE if it is prt tile * @note * This function just used by CI *************************************************************************************************** */ BOOL_32 AddrLib1::IsPrtTileMode( AddrTileMode tileMode) { - return m_modeFlags[tileMode].isPrt; + return ModeFlags[tileMode].isPrt; } /** *************************************************************************************************** * AddrLib1::ComputeMipLevel * * @brief * Compute mipmap level width/height/slices * @return * N/A diff --git a/src/amd/addrlib/core/addrlib1.h b/src/amd/addrlib/core/addrlib1.h index a852ac2..6ca5826 100644 --- a/src/amd/addrlib/core/addrlib1.h +++ b/src/amd/addrlib/core/addrlib1.h @@ -422,21 +422,21 @@ protected: UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( UINT_32 pipe, UINT_32 x) const = 0; // // Misc helper // - static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT]; + static const AddrTileModeFlags ModeFlags[ADDR_TM_COUNT]; static UINT_32 Thickness( AddrTileMode tileMode); // Checking tile mode static BOOL_32 IsMacroTiled(AddrTileMode tileMode); static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); static BOOL_32 IsLinear(AddrTileMode tileMode); static BOOL_32 IsMicroTiled(AddrTileMode tileMode); static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev