From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeon/r600_cs.h | 15 ---------------
src/gallium/drivers/radeon/r600_pipe_common.c | 7 ++++---
src/gallium/drivers/radeon/r600_query.c | 12 ++++++------
src/gallium/drivers/radeonsi/si_state_streamout.c | 12 ++++++++----
4 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_cs.h
b/src/gallium/drivers/radeon/r600_cs.h
index 28bdf15..b4af5a6 100644
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -106,35 +106,20 @@ radeon_add_to_buffer_list_check_mem(struct
r600_common_context *rctx,
{
if (check_mem &&
!radeon_cs_memory_below_limit(rctx->screen, ring->cs,
rctx->vram + rbo->vram_usage,
rctx->gtt + rbo->gart_usage))
ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL);
return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
}
-static inline void r600_emit_reloc(struct r600_common_context *rctx,
- struct r600_ring *ring, struct r600_resource
*rbo,
- enum radeon_bo_usage usage,
- enum radeon_bo_priority priority)
-{
- struct radeon_winsys_cs *cs = ring->cs;
- bool has_vm = ((struct
r600_common_screen*)rctx->b.screen)->info.has_virtual_memory;
- unsigned reloc = radeon_add_to_buffer_list(rctx, ring, rbo, usage,
priority);
-
- if (!has_vm) {
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
- radeon_emit(cs, reloc);
- }
-}
-
static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs,
unsigned reg, unsigned num)
{
assert(reg < R600_CONTEXT_REG_OFFSET);
assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2);
}
static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned
reg, unsigned value)
{
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index a6008a1..262476f 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -162,23 +162,24 @@ void si_gfx_write_event_eop(struct r600_common_context
*ctx,
}
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
radeon_emit(cs, op);
radeon_emit(cs, va);
radeon_emit(cs, ((va >> 32) & 0xffff) | sel);
radeon_emit(cs, new_fence); /* immediate data */
radeon_emit(cs, 0); /* unused */
}
- if (buf)
- r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE,
- RADEON_PRIO_QUERY);
+ if (buf) {
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, buf,
RADEON_USAGE_WRITE,
+ RADEON_PRIO_QUERY);
+ }
}
unsigned si_gfx_write_fence_dwords(struct r600_common_screen *screen)
{
unsigned dwords = 6;
if (screen->chip_class == CIK ||
screen->chip_class == VI)
dwords *= 2;
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index 3abfe1e..e4dbb1d 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -784,22 +784,22 @@ static void r600_query_hw_do_emit_start(struct
r600_common_context *ctx,
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) |
EVENT_INDEX(2));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
break;
default:
assert(0);
}
- r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, query->buffer.buf,
RADEON_USAGE_WRITE,
+ RADEON_PRIO_QUERY);
}
static void r600_query_hw_emit_start(struct r600_common_context *ctx,
struct r600_query_hw *query)
{
uint64_t va;
if (!query->buffer.buf)
return; // previous buffer allocation failure
@@ -877,22 +877,22 @@ static void r600_query_hw_do_emit_stop(struct
r600_common_context *ctx,
radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) |
EVENT_INDEX(2));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
fence_va = va + sample_size;
break;
}
default:
assert(0);
}
- r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, query->buffer.buf,
RADEON_USAGE_WRITE,
+ RADEON_PRIO_QUERY);
if (fence_va)
si_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
EOP_DATA_SEL_VALUE_32BIT,
query->buffer.buf, fence_va,
0x80000000,
query->b.type);
}
static void r600_query_hw_emit_stop(struct r600_common_context *ctx,
struct r600_query_hw *query)
@@ -930,22 +930,22 @@ static void emit_set_predicate(struct r600_common_context
*ctx,
if (ctx->chip_class >= GFX9) {
radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 2, 0));
radeon_emit(cs, op);
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
} else {
radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 1, 0));
radeon_emit(cs, va);
radeon_emit(cs, op | ((va >> 32) & 0xFF));
}
- r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_READ,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, buf, RADEON_USAGE_READ,
+ RADEON_PRIO_QUERY);
}
static void r600_emit_query_predication(struct r600_common_context *ctx,
struct r600_atom *atom)
{
struct r600_query_hw *query = (struct r600_query_hw *)ctx->render_cond;
struct r600_query_buffer *qbuf;
uint32_t op;
bool flag_wait, invert;
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c
b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 35fbcea..f4fcf70 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -288,22 +288,24 @@ static void si_emit_streamout_begin(struct
r600_common_context *rctx, struct r60
/* Append. */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_MEM)); /* control */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, va); /* src address lo */
radeon_emit(cs, va >> 32); /* src address hi */
- r600_emit_reloc(&sctx->b, &sctx->b.gfx,
t[i]->buf_filled_size,
- RADEON_USAGE_READ,
RADEON_PRIO_SO_FILLED_SIZE);
+ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+ t[i]->buf_filled_size,
+ RADEON_USAGE_READ,
+ RADEON_PRIO_SO_FILLED_SIZE);
} else {
/* Start from the beginning. */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_PACKET)); /* control */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, t[i]->b.buffer_offset >> 2); /* buffer
offset in DW */
radeon_emit(cs, 0); /* unused */
}
@@ -328,22 +330,24 @@ void si_emit_streamout_end(struct si_context *sctx)
va = t[i]->buf_filled_size->gpu_address +
t[i]->buf_filled_size_offset;
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_NONE) |
STRMOUT_STORE_BUFFER_FILLED_SIZE); /* control */
radeon_emit(cs, va); /* dst address lo */
radeon_emit(cs, va >> 32); /* dst address hi */
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
- r600_emit_reloc(&sctx->b, &sctx->b.gfx, t[i]->buf_filled_size,
- RADEON_USAGE_WRITE, RADEON_PRIO_SO_FILLED_SIZE);
+ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+ t[i]->buf_filled_size,
+ RADEON_USAGE_WRITE,
+ RADEON_PRIO_SO_FILLED_SIZE);
/* Zero the buffer size. The counters (primitives generated,
* primitives emitted) may be enabled even if there is not
* buffer bound. This ensures that the primitives-emitted query
* won't increment. */
radeon_set_context_reg(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 +
16*i, 0);
t[i]->buf_filled_size_valid = true;
}
--
2.7.4
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