Kenneth Graunke <kenn...@whitecape.org> writes: > On Thursday, May 3, 2018 11:51:52 PM PDT Chris Wilson wrote: >> Quoting Kenneth Graunke (2018-05-04 02:12:39) >> > --- >> > src/mesa/drivers/dri/i965/brw_bufmgr.c | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> > This enables it for Broadwell (with a 64-bit kernel) and Skylake+ (with >> > any kernel). Unfortunately, it doesn't enable it for Cherryview as that >> > has a 32-bit GTT. We could switch that over as well, but we'd have to >> > have a single memory zone, which is kind of a special case... >> >> I would make it conditional on gem_param(HAS_ALIASING_PPGTT) > 1 (that >> is on full-ppgtt, where you don't have to care about framebuffers and >> GTT mmaps conflicting). >> -Chris > > Good idea, thanks! Fixed for v2.
I think the ALIASING_PPGTT test is actually redundant with the I915_CONTEXT_PARAM_GTT_SIZE > 4 GiB test that you're already doing. So patch v1 is Reviewed-by: Scott D Phillips <scott.d.phill...@intel.com> > --Ken > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
