On 2018-06-09 05:16 AM, Marek Olšák wrote:
> From: Marek Olšák <marek.ol...@amd.com>
>
> This improves performance for certain games.
>
> Cc: 18.1 <mesa-sta...@lists.freedesktop.org>
> ---
> src/gallium/drivers/radeonsi/si_buffer.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_buffer.c
> b/src/gallium/drivers/radeonsi/si_buffer.c
> index 2d68edc3404..0546fa9d336 100644
> --- a/src/gallium/drivers/radeonsi/si_buffer.c
> +++ b/src/gallium/drivers/radeonsi/si_buffer.c
> @@ -144,22 +144,26 @@ void si_init_resource_fields(struct si_screen *sscreen,
> if (res->b.b.target == PIPE_BUFFER &&
> res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT |
> PIPE_RESOURCE_FLAG_MAP_COHERENT)) {
> /* Use GTT for all persistent mappings with older
> * kernels, because they didn't always flush the HDP
> * cache before CS execution.
> *
> * Write-combined CPU mappings are fine, the kernel
> * ensures all CPU writes finish before the GPU
> * executes a command stream.
> + *
> + * radeon doesn't have good BO move throttling, so put all
> + * persistent buffers into GTT to prevent VRAM CPU page faults.
> */
> - if (!sscreen->info.kernel_flushes_hdp_before_ib)
> + if (!sscreen->info.kernel_flushes_hdp_before_ib ||
> + sscreen->info.drm_major == 2)
> res->domains = RADEON_DOMAIN_GTT;
sscreen->info.kernel_flushes_hdp_before_ib is always true with amdgpu,
so this could be simplified to
if (sscreen->info.drm_major == 2)
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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