Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/amd/vulkan/radv_private.h | 3 +++
src/amd/vulkan/radv_shader.h | 18 ++++++++++++++
src/amd/vulkan/radv_shader_info.c | 39 +++++++++++++++++++++++++++++++
3 files changed, 60 insertions(+)
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 33ba8a7354..de54e63074 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -99,6 +99,9 @@ typedef uint32_t xcb_window_t;
#define NUM_META_FS_KEYS 12
#define RADV_MAX_DRM_DEVICES 8
#define MAX_VIEWS 8
+#define MAX_SO_STREAMS 4
+#define MAX_SO_BUFFERS 4
+#define MAX_SO_OUTPUTS 64
#define NUM_DEPTH_CLEAR_PIPELINES 3
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index dc6c48d306..870e4af0b1 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -143,6 +143,22 @@ enum radv_ud_index {
AC_UD_TES_MAX_UD,
AC_UD_MAX_UD = AC_UD_TCS_MAX_UD,
};
+
+struct radv_stream_output {
+ uint8_t location;
+ uint8_t buffer;
+ uint16_t offset;
+ uint8_t component_mask;
+ uint8_t stream;
+};
+
+struct radv_streamout_info {
+ uint16_t num_outputs;
+ struct radv_stream_output outputs[MAX_SO_OUTPUTS];
+ uint16_t strides[MAX_SO_BUFFERS];
+ uint32_t enabled_stream_buffers_mask;
+};
+
struct radv_shader_info {
bool loads_push_constants;
uint32_t desc_set_used_mask;
@@ -189,6 +205,8 @@ struct radv_shader_info {
uint64_t outputs_written;
uint64_t patch_outputs_written;
} tcs;
+
+ struct radv_streamout_info so;
};
struct radv_userdata_info {
diff --git a/src/amd/vulkan/radv_shader_info.c
b/src/amd/vulkan/radv_shader_info.c
index 29f5f68a32..f7888ec6a6 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -24,6 +24,7 @@
#include "radv_shader.h"
#include "nir/nir.h"
#include "nir/nir_deref.h"
+#include "nir/nir_xfb_info.h"
static void mark_sampler_desc(const nir_variable *var,
struct radv_shader_info *info)
@@ -470,6 +471,39 @@ gather_info_output_decl(const nir_shader *nir, const
nir_variable *var,
}
}
+static void
+gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info)
+{
+ nir_xfb_info *xfb = nir_gather_xfb_info(nir, NULL);
+ struct radv_streamout_info *so = &info->so;
+
+ if (!xfb)
+ return;
+
+ assert(xfb->output_count < MAX_SO_OUTPUTS);
+ so->num_outputs = xfb->output_count;
+
+ for (unsigned i = 0; i < xfb->output_count; i++) {
+ struct radv_stream_output *output = &so->outputs[i];
+
+ output->buffer = xfb->outputs[i].buffer;
+ output->stream = xfb->buffer_to_stream[xfb->outputs[i].buffer];
+ output->offset = xfb->outputs[i].offset;
+ output->location = xfb->outputs[i].location;
+ output->component_mask = xfb->outputs[i].component_mask;
+
+ so->enabled_stream_buffers_mask |=
+ (1 << output->buffer) << (output->stream * 4);
+
+ }
+
+ for (unsigned i = 0; i < NIR_MAX_XFB_BUFFERS; i++) {
+ so->strides[i] = xfb->strides[i] / 4;
+ }
+
+ ralloc_free(xfb);
+}
+
void
radv_nir_shader_info_pass(const struct nir_shader *nir,
const struct radv_nir_compiler_options *options,
@@ -490,4 +524,9 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
nir_foreach_variable(variable, &nir->outputs)
gather_info_output_decl(nir, variable, info, options);
+
+ if (nir->info.stage == MESA_SHADER_VERTEX ||
+ nir->info.stage == MESA_SHADER_TESS_EVAL ||
+ nir->info.stage == MESA_SHADER_GEOMETRY)
+ gather_xfb_info(nir, info);
}
--
2.19.1
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