On Fri, Jan 11, 2019 at 6:53 PM Marek Olšák <[email protected]> wrote:
> From: Marek Olšák <[email protected]> > > This fixes an assertion failure with GLCTX when cts-runner is used. > (not a specific test) > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108877 > Cc: 18.3 <[email protected]> > --- > .../drivers/radeonsi/si_state_viewport.c | 21 ++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > > diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c > b/src/gallium/drivers/radeonsi/si_state_viewport.c > index 76c56447eb0..b8b6198610c 100644 > --- a/src/gallium/drivers/radeonsi/si_state_viewport.c > +++ b/src/gallium/drivers/radeonsi/si_state_viewport.c > @@ -139,20 +139,22 @@ static void si_emit_one_scissor(struct si_context > *ctx, > return; > } > > radeon_emit(cs, S_028250_TL_X(final.minx) | > S_028250_TL_Y(final.miny) | > S_028250_WINDOW_OFFSET_DISABLE(1)); > radeon_emit(cs, S_028254_BR_X(final.maxx) | > S_028254_BR_Y(final.maxy)); > } > > +#define MAX_PA_SU_HARDWARE_SCREEN_OFFSET 8176 > + > static void si_emit_guardband(struct si_context *ctx) > { > const struct si_state_rasterizer *rs = > ctx->queued.named.rasterizer; > struct si_signed_scissor vp_as_scissor; > struct pipe_viewport_state vp; > float left, top, right, bottom, max_range, guardband_x, > guardband_y; > float discard_x, discard_y; > > if (ctx->vs_writes_viewport_index) { > /* Shaders can draw to any viewport. Make a union of all > @@ -172,27 +174,26 @@ static void si_emit_guardband(struct si_context *ctx) > */ > if (ctx->vs_disables_clipping_viewport) > vp_as_scissor.quant_mode = > SI_QUANT_MODE_16_8_FIXED_POINT_1_256TH; > > /* Determine the optimal hardware screen offset to center the > viewport > * within the viewport range in order to maximize the guardband > size. > */ > int hw_screen_offset_x = (vp_as_scissor.maxx + vp_as_scissor.minx) > / 2; > int hw_screen_offset_y = (vp_as_scissor.maxy + vp_as_scissor.miny) > / 2; > > - const unsigned hw_screen_offset_max = 8176; > /* SI-CI need to align the offset to an ubertile consisting of all > SEs. */ > const unsigned hw_screen_offset_alignment = > ctx->chip_class >= VI ? 16 : > MAX2(ctx->screen->se_tile_repeat, 16); > > - hw_screen_offset_x = CLAMP(hw_screen_offset_x, 0, > hw_screen_offset_max); > - hw_screen_offset_y = CLAMP(hw_screen_offset_y, 0, > hw_screen_offset_max); > + hw_screen_offset_x = CLAMP(hw_screen_offset_x, 0, > MAX_PA_SU_HARDWARE_SCREEN_OFFSET); > + hw_screen_offset_y = CLAMP(hw_screen_offset_y, 0, > MAX_PA_SU_HARDWARE_SCREEN_OFFSET); > > /* Align the screen offset by dropping the low bits. */ > hw_screen_offset_x &= ~(hw_screen_offset_alignment - 1); > hw_screen_offset_y &= ~(hw_screen_offset_alignment - 1); > > /* Apply the offset to center the viewport and maximize the > guardband. */ > vp_as_scissor.minx -= hw_screen_offset_x; > vp_as_scissor.maxx -= hw_screen_offset_x; > vp_as_scissor.miny -= hw_screen_offset_y; > vp_as_scissor.maxy -= hw_screen_offset_y; > @@ -325,20 +326,34 @@ static void si_set_viewport_states(struct > pipe_context *pctx, > struct si_signed_scissor *scissor = > &ctx->viewports.as_scissor[index]; > > ctx->viewports.states[index] = state[i]; > > si_get_scissor_from_viewport(ctx, &state[i], scissor); > > unsigned w = scissor->maxx - scissor->minx; > unsigned h = scissor->maxy - scissor->miny; > unsigned max_extent = MAX2(w, h); > > + unsigned center_x = scissor->maxx + scissor->minx; > + unsigned center_y = scissor->maxy + scissor->miny; > These two should be divided by 2. Fixed locally. Marek > + unsigned max_center = MAX2(center_x, center_y); > + > + /* PA_SU_HARDWARE_SCREEN_OFFSET can't center viewports > whose > + * center start farther than > MAX_PA_SU_HARDWARE_SCREEN_OFFSET. > + * (for example, a 1x1 viewport in the lower right corner > of > + * 16Kx16K) Such viewports need a greater guardband, so > they > + * have to use a worse quantization mode. > + */ > + unsigned distance_off_center = > + MAX2(0, (int)max_center - > MAX_PA_SU_HARDWARE_SCREEN_OFFSET); > + max_extent += distance_off_center; > + > /* Determine the best quantization mode (subpixel > precision), > * but also leave enough space for the guardband. > * > * Note that primitive binning requires QUANT_MODE == 16_8 > on Vega10 > * and Raven1. What we do depends on the chip: > * - Vega10: Never use primitive binning. > * - Raven1: Always use QUANT_MODE == 16_8. > */ > if (ctx->family == CHIP_RAVEN) > max_extent = 16384; /* Use QUANT_MODE == 16_8. */ > -- > 2.17.1 > >
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