Mirror RadeonSI. This also fixes crashes in addrlib. v2: - fix ac_nir_to_llvm
Signed-off-by: Samuel Pitoiset <[email protected]> --- src/amd/common/ac_nir_to_llvm.c | 14 +++++++------- src/amd/vulkan/radv_image.c | 4 ++-- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 6 ++++-- 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 1fbbe507eae..96bf89a8bf9 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -84,7 +84,7 @@ get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim, { switch (dim) { case GLSL_SAMPLER_DIM_1D: - if (ctx->chip_class >= GFX9) + if (ctx->chip_class == GFX9) return is_array ? ac_image_2darray : ac_image_2d; return is_array ? ac_image_1darray : ac_image_1d; case GLSL_SAMPLER_DIM_2D: @@ -1360,7 +1360,7 @@ static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx, } /* Fixup for GFX9 which allocates 1D textures as 2D. */ - if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) { + if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) { if ((args->dim == ac_image_2darray || args->dim == ac_image_2d) && !args->coords[1]) { args->coords[1] = ctx->ac.i32_0; @@ -2334,7 +2334,7 @@ static void get_image_coords(struct ac_nir_context *ctx, dim == GLSL_SAMPLER_DIM_SUBPASS_MS); bool is_ms = (dim == GLSL_SAMPLER_DIM_MS || dim == GLSL_SAMPLER_DIM_SUBPASS_MS); - bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D; + bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D; assert(!add_frag_pos && "Input attachments should be lowered by this point."); count = image_type_to_components_count(dim, is_array); @@ -2706,7 +2706,7 @@ static LLVMValueRef visit_image_size(struct ac_nir_context *ctx, z = LLVMBuildSDiv(ctx->ac.builder, z, six, ""); res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, ""); } - if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) { + if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) { LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, ""); res = LLVMBuildInsertElement(ctx->ac.builder, res, layers, ctx->ac.i32_1, ""); @@ -3829,7 +3829,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr) break; case GLSL_SAMPLER_DIM_1D: num_src_deriv_channels = 1; - if (ctx->ac.chip_class >= GFX9) { + if (ctx->ac.chip_class == GFX9) { num_dest_deriv_channels = 2; } else { num_dest_deriv_channels = 1; @@ -3877,7 +3877,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr) args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]); } - if (ctx->ac.chip_class >= GFX9 && + if (ctx->ac.chip_class == GFX9 && instr->sampler_dim == GLSL_SAMPLER_DIM_1D && instr->op != nir_texop_lod) { LLVMValueRef filler; @@ -3963,7 +3963,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr) LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, ""); z = LLVMBuildSDiv(ctx->ac.builder, z, six, ""); result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, ""); - } else if (ctx->ac.chip_class >= GFX9 && + } else if (ctx->ac.chip_class == GFX9 && instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_1D && instr->is_array) { diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 368bd5d839d..ccbec36849e 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -649,7 +649,7 @@ gfx10_make_texture_descriptor(struct radv_device *device, } type = radv_tex_dim(image->type, view_type, image->info.array_size, image->info.samples, - is_storage_image, device->physical_device->rad_info.chip_class >= GFX9); + is_storage_image, device->physical_device->rad_info.chip_class == GFX9); if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) { height = 1; depth = image->info.array_size; @@ -796,7 +796,7 @@ si_make_texture_descriptor(struct radv_device *device, data_format = V_008F14_IMG_DATA_FORMAT_S8_16; } type = radv_tex_dim(image->type, view_type, image->info.array_size, image->info.samples, - is_storage_image, device->physical_device->rad_info.chip_class >= GFX9); + is_storage_image, device->physical_device->rad_info.chip_class == GFX9); if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) { height = 1; depth = image->info.array_size; diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c index 3f4cad861c2..598baa2addc 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c @@ -90,8 +90,10 @@ static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws, struct ac_surf_config config; memcpy(&config.info, surf_info, sizeof(config.info)); - config.is_3d = !!(type == RADEON_SURF_TYPE_3D); - config.is_cube = !!(type == RADEON_SURF_TYPE_CUBEMAP); + config.is_1d = type == RADEON_SURF_TYPE_1D || + type == RADEON_SURF_TYPE_1D_ARRAY; + config.is_3d = type == RADEON_SURF_TYPE_3D; + config.is_cube = type == RADEON_SURF_TYPE_CUBEMAP; return ac_compute_surface(ws->addrlib, &ws->info, &config, mode, surf); } -- 2.22.0 _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
