On Mon, Oct 08, 2012 at 04:47:10PM +0200, Vincent Lejeune wrote:
> ---
> src/gallium/drivers/radeon/AMDGPUISelLowering.cpp | 3 +--
> src/gallium/drivers/radeon/AMDILIntrinsics.td | 1 -
> src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 +++---
> 3 files changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
> b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
> index aee625d..30dd8f3 100644
> --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
> +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
> @@ -36,6 +36,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine
> &TM) :
> setOperationAction(ISD::FEXP2, MVT::f32, Legal);
> setOperationAction(ISD::FPOW, MVT::f32, Legal);
> setOperationAction(ISD::FLOG2, MVT::f32, Legal);
> + setOperationAction(ISD::FABS, MVT::f32, Legal);
> setOperationAction(ISD::FRINT, MVT::f32, Legal);
>
> setOperationAction(ISD::UDIV, MVT::i32, Expand);
> @@ -110,8 +111,6 @@ SDValue
> AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
> return LowerIntrinsicIABS(Op, DAG);
> case AMDGPUIntrinsic::AMDIL_exp:
> return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
> - case AMDGPUIntrinsic::AMDIL_fabs:
> - return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
> case AMDGPUIntrinsic::AMDGPU_lrp:
> return LowerIntrinsicLRP(Op, DAG);
> case AMDGPUIntrinsic::AMDIL_fraction:
> diff --git a/src/gallium/drivers/radeon/AMDILIntrinsics.td
> b/src/gallium/drivers/radeon/AMDILIntrinsics.td
> index 4de5767..213c8bb 100644
> --- a/src/gallium/drivers/radeon/AMDILIntrinsics.td
> +++ b/src/gallium/drivers/radeon/AMDILIntrinsics.td
> @@ -66,7 +66,6 @@ let TargetPrefix = "AMDIL", isTarget = 1 in {
> }
>
> let TargetPrefix = "AMDIL", isTarget = 1 in {
> - def int_AMDIL_fabs : GCCBuiltin<"__amdil_fabs">, UnaryIntFloat;
> def int_AMDIL_abs : GCCBuiltin<"__amdil_abs">, UnaryIntInt;
>
> def int_AMDIL_bit_extract_i32 : GCCBuiltin<"__amdil_ibit_extract">,
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index cc690c0..a8327ac 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -538,7 +538,7 @@ static void emit_prepare_cube_coords(
> coords[i] = LLVMBuildExtractElement(builder, v, idx, "");
> }
>
> - coords[2] = build_intrinsic(builder, "llvm.AMDIL.fabs.",
> + coords[2] = build_intrinsic(builder, "fabs",
> type, &coords[2], 1, LLVMReadNoneAttribute);
> coords[2] = build_intrinsic(builder, "llvm.AMDGPU.rcp",
> type, &coords[2], 1, LLVMReadNoneAttribute);
> @@ -1122,8 +1122,8 @@ void radeon_llvm_context_init(struct
> radeon_llvm_context * ctx)
>
>
>
> - bld_base->op_actions[TGSI_OPCODE_ABS].emit = build_tgsi_intrinsic_nomem;
> - bld_base->op_actions[TGSI_OPCODE_ABS].intr_name = "llvm.AMDIL.fabs.";
> + bld_base->op_actions[TGSI_OPCODE_ABS].emit =
> build_tgsi_intrinsic_readonly;
> + bld_base->op_actions[TGSI_OPCODE_ABS].intr_name = "fabs";
I've noticed this on a few of the patches. Why fabs for the intrinsic
name instead of llvm.fabs?
-Tom
> bld_base->op_actions[TGSI_OPCODE_ARL].emit = build_tgsi_intrinsic_nomem;
> bld_base->op_actions[TGSI_OPCODE_ARL].intr_name = "llvm.AMDGPU.arl";
> bld_base->op_actions[TGSI_OPCODE_BGNLOOP].emit = bgnloop_emit;
> --
> 1.7.11.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
