On 02/06/2013 05:29 PM, Eric Anholt wrote:
The code was rather broken for non-XYZW on 8-wide, but all of our callers were using XYZW anyway. For my experiments with using writemask on texturing, I've been using manual header setup in the compiler backends, since we want to actually know what registers are written for optimization and register allocation. --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 1 - src/mesa/drivers/dri/i965/brw_eu.h | 1 - src/mesa/drivers/dri/i965/brw_eu_emit.c | 123 ++++---------------------- src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 1 - src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 1 - 5 files changed, 18 insertions(+), 109 deletions(-)
Patches 4-6 are: Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> I haven't gotten to #3 yet, but I'll try to. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
