Brian Paul wrote:
>
> Keith Whitwell wrote:
> >
> > Brian Paul wrote:
> > >
> > > I'm posting the following on behalf of Dave Wilkinson, who's associated
> > > with cosource.com, an organization to provide funding for free software
> > > projects.
> > >
> > > PIII optimizations for Mesa would be great. I have a few contacts at
> > > Intel so getting technical information shouldn't be too hard. I think
> > > we just need to find someone with (1) Intel assembly experience, (2)
> > > a PIII system, and (3) free time.
> > >
> >
> > As I also post on their notice board:
> >
> > For q3, the bulk of processing can be done inside the part of mesa which is
> > device specific. This is the case with the current FX driver, but not with
> > any
> > other driver.
> >
> > The point is that this task is fairly specific to the hardware used to
> > measure
> > performance, and should be specified as such. Thus 'Improve q3 by 10% on
> > 3dfx
> > voodoo-2' is quite different to the same task on Matrox g200.
> >
> > There is still some shared code - state management and so forth - and a
> > very talented individual might squeeze 10% overall out of that.
>
> But the hooks are in place in the core code to implement SSE-optimized
> vertex transformation code. That's what I'd like to see done.
> Does the 3Dfx driver now implement that code in the driver itself?
The fast path in the FX code, which is 70% or so of q3's cpu time inside mesa,
doesn't use the general purpose transformation routines - it has its own
specialized assembly.
An interesting project, discussed a little while ago on this list, is how to
generalize the (cpu x hardware-vertex-format) combinatorics to come up with a
generalized fast path which can be parameterized for individual hardware
combinations.
Keith
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