The patch
________________________________ From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Xiang, Haihao Sent: 2007年2月9日 13:12 To: [email protected] Subject: [Mesa3d-dev] [PATCH][I965]wait irq after reseting fence Hi, I ran glxgears for a long time on a 965 machine and got an assertion (line1358 in bufmgr_fake.c: assert(bmTestFence(intel, fence));). I see the counter (related to fence) will be reset to 1 when it gets the maximum value (0x7fffffff) in drm/i915 driver, but it is possible sarea->last_dispatch still is 0x7fffffxx, so function intelWaitIrq must handle this situation. Thanks Haihao
i965_wait_irq.patch
Description: i965_wait_irq.patch
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