Markus Amsler wrote: > With the attached patch I get in wow with enabled pixel shaders with my > rv370 10-15% better frame rates. Its mostly because the global "terrain" > shader uses 4 indirection with this patch, without it gets optimized to > 1. I'm not sure what exactly goes on. My best guess is the more > indirection the more silicon gets used (better parallelizable). > If that's the cause we should try to use as many indirection fit into > the hardware as possible (perhaps even adding indirections). The easiest > way would be to translate the shader multiple times with increasing > optimization until it fits into the hardware.
I don't think this makes sense in general. If you have more indirections, you have more phases, and everything I know about this hardware (which is admittedly not that much) would indicate additional phases will have a performance cost. Though maybe due to how scheduling works on this chip, if you have a lot of texture instructions in one phase, the chip might not be able to hide texture fetch latencies with doing some ALU work. Some more investigation would be needed. Roland ------------------------------------------------------------------------- This SF.net email is sponsored by the 2008 JavaOne(SM) Conference Don't miss this year's exciting event. There's still time to save $100. Use priority code J8TL2D2. http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone _______________________________________________ Mesa3d-dev mailing list Mesa3d-dev@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mesa3d-dev
