Curious. Admittedly I can't look at the content of that commit, but they
can't be too useless if compiz selects them. IIRC the point was to limit the
runtime of Intel internal tests; can't those tests be amended instead? The
number of configs will only grow; r300g has over 200 now thanks to
multisampling.
Posting from a mobile, pardon my terseness. ~ C.
On Jun 29, 2010 1:28 PM, "Maxim Levitsky" <maximlevit...@gmail.com> wrote:
On Tue, 2010-06-29 at 20:34 +0300, Maxim Levitsky wrote:
> On Sun, 2010-06-27 at 19:07 +0300, Maxim ...
Bisected this to
73e24cd5a7a0760726a681dda5b88805ddcf1555 is first bad commit
commit 73e24cd5a7a0760726a681dda5b88805ddcf1555
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Mon Feb 8 10:34:52 2010 -0800
intel: Stop exposing useless 24 depth/0 stencil configs
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
Reviewed-by: Kristian Høgsberg <k...@bitplanet.net>
:040000 040000 5ba858b23d6502d9eaa39a8ec612a38ffae50e2c
0060acef28a49d519aed5a21cbde2bc833f840a8 M src
Reverting this, and removing one assert, fixes compiz
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index 61803cf..0f6d1da 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -306,7 +306,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
}
if (mesaVis->depthBits == 24) {
- assert(mesaVis->stencilBits == 8);
+ //assert(mesaVis->stencilBits == 8);
/* combined depth/stencil buffer */
struct intel_renderbuffer *depthStencilRb
= intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
Best regards,
Maxim Levitsku
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