Hi Tomas

Thanks for speedy reply. From what I can see uart1 is being set:

$ bitbake -e virtual/fsbl | grep STDIN
...
YAML_SERIAL_CONSOLE_STDIN="psu_uart_1"
...

$ bitbake -e virtual/fsbl | grep STDOUT
...
YAML_SERIAL_CONSOLE_STDOUT="psu_uart_1"
...

The definition in meta-xilinx-tools/classes/xsctyaml.bbclass confirms this:
YAML_SERIAL_CONSOLE_STDIN_ultra96-zynqmp ?= "psu_uart_1"
YAML_SERIAL_CONSOLE_STDOUT_ultra96-zynqmp ?= "psu_uart_1"

And yet it doesn't work. I have asked the person who posted the 'hacked' 
working boot.bin on the other forum for more information of what they changed, 
hopefully they will respond.

If this works for other people (with psu_uart_1) then it implies something 
wrong with my build or my hardware I guess but it is strange that it works 
perfectly well with the other boot.bin (to a point - the kernel panics because 
of different PMU versions which is expected).

Thanks
Simon

-----"Tomas Thoresen" <[email protected]> wrote: -----
To: "[email protected]" <[email protected]>, 
"[email protected]" <[email protected]>
From: "Tomas Thoresen" <[email protected]>
Date: 09/26/2018 10:18AM
Subject: RE: [meta-xilinx] Ultra96 UART

Hi Simon,

 

If I’m not mistaking, I believe it uses uart1 instead of uart0...

 

So, something like this:

 

YAML_BSP_CONFIG[stdin]="set,psu_uart_1"

YAML_BSP_CONFIG[stdout]="set,psu_uart_1" 



 

Hope this helps.

 

Cheers,

 

Tomas

 

From: [email protected] 
[mailto:[email protected]] On Behalf Of [email protected]
Sent: 26 September 2018 09:48
To: [email protected]
Subject: [meta-xilinx] Ultra96 UART

 

Hi

 

I am trying to get a meta-xilinx/meta-xilinx-tools build (using versions Rocko 
& rel-v2018.2) to boot on an Ultra96 board. Following the various bits of 
guidance from this list I have successfully built, and have all the files I 
would expect in tmp/deploy/images/. 

 

The files do not seem to boot - or at least I don't see anything on the serial 
(via the Avnet serial to USB dongle for the Ultra96). 

 

I have read on another forum 
(http://zedboard.org/content/j6-serial-port-appears-not-be-working) that the 
default config of the FSBL for the Ultra96 board does not configure the UART 
properly and indeed using a 'hacked' boot.bin which has been 'fixed' from that 
forum entry I can boot the board and see output on the UART.

 

My questions are:

 

- Has anyone else successfully booted an Ultra96 using 
meta-xilinx/meta-xilinx-tools?

- If so, did you see anything on the UART? Were any changes made to the FSBL 
configuration to achieve this?

 

Any comments or guidance gratefully received!

 

Thanks & regards

Simon Goda

 

 

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