i'm about to take a shot at building a QEMU image using
meta-xilinx-bsp layer for zcu102 and, with what little i know about
FPGAs, i was under the impression that i *must* supply a .bit or .hdf
or .dsa/.xsa file to define the PL part of the target.
must i explicitly provide that, or does the generic zcu102 build
have a generic FPGA file that will be used if i don't? i just want to
get through a build without having to become an expert on FPGA stuff,
and worry about defining the FPGA content later.
thanks.
rday
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Robert P. J. Day Ottawa, Ontario, CANADA
http://crashcourse.ca
Twitter: http://twitter.com/rpjday
LinkedIn: http://ca.linkedin.com/in/rpjday
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