Kai: The reason that I mention 80-bit floating point because that's the
hardware floating point that is used in Intel and AMD 64 processors, and
thus it's the base engine upon which single and double precision floating
point is done in HLLs.
I didn't know that the 128-bit IEEE floating point added another three bits
to the exponent. I see by the Wikipedia page
http://en.wikipedia.org/wiki/IEEE_floating-point_standard
that they don't have a signed 16-bit exponent and a signed 112-bit mantissa
like my package when you specify 16 bytes as the word length, though. They
keep the Von Nieumann approach of keeping the sign for the whole quantity as
the MSB and using a biased instead of a signed exponent, which provides a
monotonic representation in which, if one treats a 128-bit FP quantity as a
128-bit integer and adds a 1 to any bit in it, the result is either an
overflow or another FP quantity, possibly un-normalized, that is greater
arithmetically; this allows integer quantity comparisons to work with
floating point.
James K Beard
-----Original Message-----
From: Kai Tietz [mailto:[email protected]]
Sent: Sunday, April 10, 2011 9:29 AM
To: [email protected]
Cc: James K Beard; [email protected]; JonY
Subject: Re: [Mingw-w64-public] mingw-w64 Decimal Floating Point math
2011/4/10 James K Beard <[email protected]>:
> There are better libraries than mine for 128-bit, which is quad precision,
> that use 12-bit exponents; my package always uses 16-bit exponents. Quad
> precision packages use the hardware 80-bit floating point in most CPU
cores
> these days and would be smaller and faster than my package. My package is
> useful for precisions higher than 128 bits. I typically use it for 256
bits
> and higher.
Sorry, I don't talk here about 80-bit floating point. I am talking
about 128-bit and this isn't supported in hardware by x86/x64 CPU. The
exponent for 128-bit is 15-bit, 1-bit for sign, and 112 bits for
mantissa, at least as IEEE defines it.
Kai
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