On Tue, 24 May 2016 16:02:21 -0400
Steve Shockley <[email protected]> wrote:
> I have an HP BL460c blade I'm using with OpenBSD. I was able to get
> 5.8 to install by disabling ACPI; since I'm lazy I didn't submit a bug
> report. I tried to upgrade to 5.9 (and -current), but booting from
I hit a similar problem on NEC Express5800/R110h-1. On that machine,
X2APIC is enabled on boot and this seems to cause the panic following.
> cpu0 at mainbus0panic: cpu at apic id 0 already attached?
So the diff disables the X2APIC. Can you try the diff attached?
Index: sys/arch/amd64/amd64/cpu.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/cpu.c,v
retrieving revision 1.102
diff -u -p -r1.102 cpu.c
--- sys/arch/amd64/amd64/cpu.c 28 Jul 2016 21:57:57 -0000 1.102
+++ sys/arch/amd64/amd64/cpu.c 4 Aug 2016 02:51:08 -0000
@@ -683,6 +683,8 @@ cpu_hatch(void *v)
ci->ci_flags |= CPUF_PRESENT;
+ if (ci->ci_flags & CPUF_AP)
+ lapic_ap_init();
lapic_enable();
lapic_startclock();
Index: sys/arch/amd64/amd64/lapic.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/lapic.c,v
retrieving revision 1.44
diff -u -p -r1.44 lapic.c
--- sys/arch/amd64/amd64/lapic.c 22 Jun 2016 01:12:38 -0000 1.44
+++ sys/arch/amd64/amd64/lapic.c 4 Aug 2016 02:51:08 -0000
@@ -155,6 +155,19 @@ x2apic_writeicr(u_int32_t hi, u_int32_t
__asm volatile("wrmsr" : : "a" (lo), "d" (hi), "c" (msr));
}
+void
+x2apic_disable(void)
+{
+ uint64_t msr;
+
+ msr = rdmsr(MSR_APICBASE);
+ if (msr & APICBASE_ENABLE_X2APIC) {
+ wrmsr(MSR_APICBASE,
+ (msr & ~(APICBASE_GLOBAL_ENABLE|APICBASE_ENABLE_X2APIC)));
+ wrmsr(MSR_APICBASE, (msr & ~APICBASE_ENABLE_X2APIC));
+ }
+}
+
u_int32_t
lapic_cpu_number(void)
{
@@ -204,6 +217,8 @@ lapic_map(paddr_t lapic_base)
return;
}
+ x2apic_disable();
+
va = (vaddr_t)&local_apic;
disable_intr();
@@ -370,6 +385,13 @@ lapic_boot_init(paddr_t lapic_base)
#ifdef MULTIPROCESSOR
evcount_attach(&ipi_count, "ipi", &ipi_irq);
#endif
+}
+
+void
+lapic_ap_init(void)
+{
+ if (!x2apic_enabled)
+ x2apic_disable();
}
static __inline u_int32_t
Index: sys/arch/amd64/amd64/mptramp.S
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/mptramp.S,v
retrieving revision 1.13
diff -u -p -r1.13 mptramp.S
--- sys/arch/amd64/amd64/mptramp.S 16 May 2016 01:54:15 -0000 1.13
+++ sys/arch/amd64/amd64/mptramp.S 4 Aug 2016 02:51:08 -0000
@@ -188,30 +188,35 @@ _TRMP_LABEL(mptramp_longmode)
_C_LABEL(cpu_spinup_trampoline_end): #end of code copied to MP_TRAMPOLINE
.globl _C_LABEL(x2apic_enabled)
- movl x2apic_enabled,%eax
- testl %eax,%eax
- jz 1f
-
mov $MSR_APICBASE,%ecx
mov $0,%edx
rdmsr
+ mov %eax,%edi
+ andl $APICBASE_ENABLE_X2APIC,%eax
+ testl %eax,%eax
+ jnz 1f
+ movl x2apic_enabled,%eax
+ testl %eax,%eax
+ jz 2f
+ mov %edi,%eax
orl $APICBASE_ENABLE_X2APIC,%eax
wrmsr
+1:
mov $MSR_X2APIC_ID,%ecx
rdmsr
andl $X2APIC_ID_MASK,%eax
- jmp 2f
-1:
+ jmp 3f
+2:
movl _C_LABEL(local_apic)+LAPIC_ID,%eax
shrl $LAPIC_ID_SHIFT,%eax
-2:
- xorq %rcx,%rcx
3:
+ xorq %rcx,%rcx
+4:
movq _C_LABEL(cpu_info)(,%rcx,8),%rdi
incq %rcx
movl CPU_INFO_APICID(%rdi),%edx
cmpl %eax,%edx
- jne 3b
+ jne 4b
movq CPU_INFO_IDLE_PCB(%rdi),%rsi
Index: sys/arch/amd64/include/i82489var.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/i82489var.h,v
retrieving revision 1.17
diff -u -p -r1.17 i82489var.h
--- sys/arch/amd64/include/i82489var.h 22 Jun 2016 01:12:38 -0000 1.17
+++ sys/arch/amd64/include/i82489var.h 4 Aug 2016 02:51:08 -0000
@@ -118,6 +118,7 @@ extern void Xrecurse_hyperv_upcall(void)
struct cpu_info;
extern void lapic_boot_init(paddr_t);
+extern void lapic_ap_init(void);
extern void lapic_set_lvt(void);
extern void lapic_enable(void);
extern void lapic_disable(void);
