On Sun, May 09, 2010 at 02:54:55PM +0100, Owain Ainsworth wrote:
> >
> > What can I do do test / debug the intagp support (so that I have agp,
> > so that Xorg has /dev/agp0, so that it can use the intel driver)
> > on my hardware?
>
> intagp does not currently support the pineview chipset.
>
> I will look at it in a few days. Busy right now.
Scratch that, i found time.
Now this very much depends on how good the modesetting support in the
intel driver is for pineview, i sincerely recommend you test with GEM
and the new driver + this diff. Unfortunately newer intel drivers
are kernel modesetting only, and thus no bugfixes will be forthcoming
from upstream if the modesetting isn't right. I won't be able to fix
any problems in that light without hardware.
However, this is idle speculation for now, please test this diff:
Index: dev/pci//agp_i810.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/agp_i810.c,v
retrieving revision 1.61
diff -u -p -r1.61 agp_i810.c
--- dev/pci//agp_i810.c 8 Apr 2010 00:23:53 -0000 1.61
+++ dev/pci//agp_i810.c 9 May 2010 14:04:36 -0000
@@ -68,7 +68,8 @@ enum {
CHIP_I915 = 4, /* i915G/i915GM */
CHIP_I965 = 5, /* i965/i965GM */
CHIP_G33 = 6, /* G33/Q33/Q35 */
- CHIP_G4X = 7 /* G4X */
+ CHIP_G4X = 7, /* G4X */
+ CHIP_PINEVIEW = 8 /* Pineview/Pineview M */
};
struct agp_i810_softc {
@@ -181,6 +182,8 @@ agp_i810_get_chiptype(struct pci_attach_
case PCI_PRODUCT_INTEL_82G45_IGD_1:
case PCI_PRODUCT_INTEL_82G41_IGD_1:
return (CHIP_G4X);
+ case PCI_PRODUCT_INTEL_PINEVIEW_IGC_1:
+ return (CHIP_PINEVIEW);
break;
}
return (CHIP_NONE);
@@ -230,6 +233,7 @@ agp_i810_attach(struct device *parent, s
switch (isc->chiptype) {
case CHIP_I915:
case CHIP_G33:
+ case CHIP_PINEVIEW:
gmaddr = AGP_I915_GMADR;
mmaddr = AGP_I915_MMADR;
memtype = PCI_MAPREG_TYPE_MEM;
@@ -259,7 +263,8 @@ agp_i810_attach(struct device *parent, s
return;
}
- if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) {
+ if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33 ||
+ isc->chiptype == CHIP_PINEVIEW) {
isc->gtt_map = vga_pci_bar_map(vga, AGP_I915_GTTADR, 0,
BUS_SPACE_MAP_LINEAR);
if (isc->gtt_map == NULL) {
@@ -392,6 +397,7 @@ agp_i810_attach(struct device *parent, s
}
break;
case CHIP_G4X:
+ case CHIP_PINEVIEW:
/*
* GTT stolen is separate from graphics stolen on
* 4 series hardware. so ignore it in stolen gtt entries
@@ -787,7 +793,8 @@ intagp_write_gtt(struct agp_i810_softc *
if (v != 0) {
pte = v | INTEL_ENABLED;
/* 965+ can do 36-bit addressing, add in the extra bits */
- if (isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G4X)
+ if (isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G4X ||
+ isc->chiptype == CHIP_PINEVIEW || isc->chiptype == CHIP_G33)
pte |= (v & 0x0000000f00000000ULL) >> 28;
}
@@ -797,6 +804,7 @@ intagp_write_gtt(struct agp_i810_softc *
case CHIP_I915:
/* FALLTHROUGH */
case CHIP_G33:
+ case CHIP_PINEVIEW:
bus_space_write_4(isc->gtt_map->bst, isc->gtt_map->bsh,
wroff, pte);
return;
Index: dev/pci//drm/i915_drv.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/i915_drv.c,v
retrieving revision 1.73
diff -u -p -r1.73 i915_drv.c
--- dev/pci//drm/i915_drv.c 8 May 2010 21:33:49 -0000 1.73
+++ dev/pci//drm/i915_drv.c 9 May 2010 14:09:19 -0000
@@ -257,6 +257,8 @@ const static struct drm_pcidev inteldrm_
CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_IGD_1,
CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
+ {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_IGC_1,
+ CHIP_G33|CHIP_PINEVIEW|CHIP_M|CHIP_I9XX|CHIP_HWS|CHIP_GEN3},
{0, 0, 0}
};
Index: dev/pci//drm/i915_drv.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/i915_drv.h,v
retrieving revision 1.56
diff -u -p -r1.56 i915_drv.h
--- dev/pci//drm/i915_drv.h 8 May 2010 21:33:49 -0000 1.56
+++ dev/pci//drm/i915_drv.h 9 May 2010 14:07:36 -0000
@@ -368,6 +368,7 @@ struct inteldrm_file {
#define CHIP_GEN3 0x20000
#define CHIP_GEN4 0x40000
#define CHIP_GEN6 0x80000
+#define CHIP_PINEVIEW 0x100000
/* flags we use in drm_obj's do_flags */
#define I915_ACTIVE 0x0010 /* being used by the gpu. */
