On 11 M�r, sean jaye wrote:
> I need any one to answer me Urgently I want to know
> the MIPS of lame ,I want to use LAME with a
> microprocessor on an FPGA but of_course you know on
> FPGA I get low freq about 17 MHZ Is that sufficient
> to lame to work correctly
> So I need to know its max & min required freq.
I'm not sure if I understand your question.
You want to implement LAME on an FPGA and want to know if 17 MHz as the
clock frequency is enough? If yes:
It's not that easy. Everything depends on the way you implement it.
It depends on the available functional units of the CPU and how fast
they are. You can't really tell anyone how many MIPS LAME needs,
because this depends on the architecture of the CPU core. A RISC core
where every operation is finished after 1 clock cycle behaves
differently as an CISC core with different completion times for
different operations.
You also have to think how you implement LAME, e.g. either you implement
just some common functional units and then feed them in the correct
order with data (like building a DSP on the FPGA and program it), or
you hardwire every algorithm of LAME with it's own hardware units (you
need a large (for some appropriate value of 'large') FPGA for this,
but you may get a higher data throughput).
And then we have another problem to determine if 17 MHz is 'sufficient':
What are the desired operating contraints? Do you need high quality
(and slow) encoding or is the lower quality but faster operating mode
ok? Does it need to encode in realtime (I assume it has to do it in
realtime, else you question would be useless)? How does the input look
like, CD quality or 8kHz/8bit?
Bye,
Alexander.
--
Give a man a fish and you feed him for a day;
teach him to use the Net and he won't bother you for weeks.
http://www.Leidinger.net Alexander @ Leidinger.net
GPG fingerprint = C518 BC70 E67F 143F BE91 3365 79E2 9C60 B006 3FE7
_______________________________________________
mp3encoder mailing list
[EMAIL PROTECTED]
http://minnie.tuhs.org/mailman/listinfo/mp3encoder
