Dmitry wrote:
Hi Fellows,
Quadravox/imagecraft, etc. are _planing_ to add 64 bits floats support to
their compilers.
With gcc this can be done _right away_ (say, I'll upload fp double support
within an hour). But...
I doubt this is necessary for the controller with 2K ram only. 64 bit doubles
will eat lots of ram and will be slow.
Then also, all FP library (functions) must be rewritten.
I doubt I can do this 'flagged'.
Lets vote. Who wants doubles 64 bits ieee854 ?
Who does not?
It seems a number of people want floating operations on MCUs like the
MSP430, but just how many is not clear. Typically, these seem to
constitute only a small part of the software. A example would be the
integer gathering of samples in many metering applications (a key market
for the MSP430), with a single floating divide at the end to get an
average. Because there may be only a few floating variables, they might
not actually gobble up all the available RAM, even if they were 64 bit.
Whether many people would benefit from more than 32 bit floats is even
more unclear. The TI floating point package has 32 and 48 bit floats,
rather than 32 and 64. 48 was felt to give more precision for some
applications, without consuming RAM like there is a limitless supply. It
probably achieves that goal, but at some cost in terms of non-standard code.
Some people have complained about poor floating performance on the
MSP430, when using IAR or Quadravox (I don't know how well mspgcc
performs in comparison). The processor should be capable of respectable
speed, when compared to competing MCUs. I assume this is a library
software optimisation issue, rather than an actual limitation of the
MSP430. I want to look at the floating library when I get time, but so
far I have not. There have certainly been design wins which hinged on
this floating performance issue, but whether it is just a couple or many
I could not say.
Right now I would really like 40 and 48 bit integers for something I am
doing. :-\
Regards,
Steve