The TI document SLAS272C for the MSP430F13x and 14x family show the highest DCO frequency to be 4.4 MHz(min) when operating at 3 volts, and the DCO is set for the highest frequency (DCO = 7). So it would appear the highest frequency would be about 4 MHz. (See page 46 of SLAS272C.pdf for the table.)
Cheers Harry Home office phone (03) 9504 1957 hlemm...@optushome.com.au -----Original Message----- From: mspgcc-users-ad...@lists.sourceforge.net [mailto:mspgcc-users-ad...@lists.sourceforge.net]on Behalf Of Celso Providelo Sent: Thursday, December 11, 2003 6:22 AM To: 'mspgcc-users@lists.sourceforge.net' Subject: [Mspgcc-users] DCO to 8 MHz Is possible obtain 8 MHz in SMCLK using an 32.768 KHz at X1 ? I had success until 4,050 MHz, not more than this ... I'm using the following rotine adapted from Scatterweb : void dco_init(unsigned long int freq) { /*DCO initialisation SMCLK = DCOCLK MCLK = DCOCLK ACLK = 32768 / 8 */ unsigned int Compare, Oldcapture = 0; int delta = freq / 4096; /* ACLK is divided by 8, RSEL = 7, XT2 is off.*/ BCSCTL1 = XT2OFF | DIVA1 | DIVA0 | RSEL2 | RSEL1 | RSEL0; /* Init FLL to desired frequency using the 32762Hz crystal DCO frquenzy */ BCSCTL2 = 0x00; /* Stop WDT */ WDTCTL = WDTPW + WDTHOLD; /* Delay for XTAL to settle */ do IFG1 &= ~OFIFG; while (IFG1 & OFIFG); /* clear osc. fault int. flag */ IFG1 &= ~OFIFG; /*init TA for capture */ CCTL2 = CCIS0 + CM0 + CAP; // Define CCR2, CAP, ACLK TACTL = TASSEL1 + TACLR + MC1; // SMCLK, continous mode while (1) { while ((CCTL2 & CCIFG) != CCIFG); // Wait until capture occured! CCTL2 &= ~CCIFG; // Capture occured, clear flag Compare = CCR2; // Get current captured SMCLK Compare = Compare - Oldcapture; // SMCLK difference Oldcapture = CCR2; // Save current captured SMCLK /* if equal, leave "while(1)" */ if (delta == Compare) { break; } /* DCO is too fast, slow it down */ else if (delta < Compare) { DCOCTL--; /* Did DCO role under? */ if (DCOCTL == 0xFF) { /* Select next lower RSEL */ BCSCTL1--; } } else { DCOCTL++; /* Did DCO role over? */ if (DCOCTL == 0x00) { /* Select next higher RSEL*/ BCSCTL1++; } } } /* Stop CCR2 function */ CCTL2 = 0; /* Stop Timer_A */ TACTL = 0; } Any help will be nice best regards. -- Celso Providelo cp...@gwyddion.com Linux user #166906 Gwyddion - http://www.gwyddion.com GNUsp Project LAMI-Laboratories of Microprocessors Department of Electrical Engineering University of Sao Paulo (USP - Sao Carlos)
