OK here is the code I am using: #-----------------------------BEGIN test.S----------------------------------------- #include <io.h> #include <signal.h>
.section .text RESET: mov.w #0x0A00,R1 mov.w #5A80,&WDTCTL call #SetupPorts call #InitColors bis.w #GIE,R2 L1: JMP L1 SetupPorts: mov.b #0x00,&P1SEL mov.b #0xFF,&P1DIR ;All Outputs mov.b #0x00,&P1OUT mov.b #0x00,&P4SEL mov.b #0xFF,&P4DIR mov.b #0x00,&P4OUT bic.b #0x80,&P2DIR ;2.7 Input bic.b #0x80,&P2SEL bis.b #0x80,&P2IE ;2.7 Int Enable bic.b #0x80,&P2IES ;Low to high Transition RET InitColors: mov.b #0x07,&P1OUT ;This should light all LED's bis.b #0x04,&P4OUT RET P2_ISR: xor.b #0x04,&P4OUT bic.b #0x80,&P2IFG xor.b #0x07,&P1OUT RETI ;--------------------------------------------------------------- ; RESET ... VECTORS ;--------------------------------------------------------------- .section .vectors .word RESET .word P2_ISR .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET .word RESET #--------------------------------END test.S------------------------------ My Makefile: #--------------------------------BEGIN Makefile-------------------------- #Makefile for an MSP430x14x MSP_PF = /usr/local/msp430 MSP_BIN = $(MSP_PF)/bin CC = $(MSP_BIN)/msp430-gcc AS = $(MSP_BIN)/msp430-as LD = $(MSP_BIN)/msp430-ld CFLAGS = -I$(MSP_PF)/include -02 -mmcu=msp430x149 -D_GNU_ASSEMBLER_ -nostartfiles -nostdlibs all: $(CC) $(CFLAGS) test.S -o test clean: rm -f test #---------------------------END Makefile------------------------------------------- here is the OBJdump i get: #--------------------------BEGIN OBJ DUMP ----------------------------------------- test: file format elf32-msp430 Disassembly of section .text: 00001100 <__ctors_end>: 1100: 31 40 00 0a mov #2560, r1 ;#0x0a00 1104: b2 40 05 00 mov #5, &0x0120 ;#0x0005 1108: 20 01 110a: b0 12 16 11 call #4374 ;#0x1116 110e: b0 12 4c 11 call #4428 ;#0x114c 1112: 32 d2 eint 00001114 <L1>: 1114: ff 3f jmp $+0 ;abs 0x1114 00001116 <SetupPorts>: 1116: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 111a: f2 40 ff 00 mov.b #255, &0x0022 ;#0x00ff 111e: 22 00 1120: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 1124: c2 43 1f 00 mov.b #0, &0x001f ;r3 As==00 1128: f2 40 ff 00 mov.b #255, &0x001e ;#0x00ff 112c: 1e 00 112e: c2 43 1d 00 mov.b #0, &0x001d ;r3 As==00 1132: f2 c0 80 00 bic.b #128, &0x002a ;#0x0080 1136: 2a 00 1138: f2 c0 80 00 bic.b #128, &0x002e ;#0x0080 113c: 2e 00 113e: f2 d0 80 00 bis.b #128, &0x002d ;#0x0080 1142: 2d 00 1144: f2 c0 80 00 bic.b #128, &0x002c ;#0x0080 1148: 2c 00 114a: 30 41 ret 0000114c <InitColors>: 114c: f2 40 07 00 mov.b #7, &0x0021 ;#0x0007 1150: 21 00 1152: e2 d2 1d 00 bis.b #4, &0x001d ;r2 As==10 1156: 30 41 ret 00001158 <P2_ISR>: 1158: e2 e2 1d 00 xor.b #4, &0x001d ;r2 As==10 115c: f2 c0 80 00 bic.b #128, &0x002b ;#0x0080 1160: 2b 00 1162: f2 e0 07 00 xor.b #7, &0x0021 ;#0x0007 1166: 21 00 1168: 00 13 reti Disassembly of section .data: #-------------------------END of OBJ DUMP---------------------------------- BTW the examples I was using was the ones from the MSPGCC sourceforge files page, listed examples. I belive they are one ones from TI rewritten for mspgcc, I was using the slac014 directory. Please let me know if you need anymore information. --Del On Fri, 16 Jul 2004 03:37:44 +0200 Chris Liechti <cliec...@gmx.net> wrote: > Delbert Martin wrote: > > On Thu, 15 Jul 2004 13:10:20 -0500 "Garst R. Reese" <gar...@isn.net> > > wrote: > >>> I have a problem the the msp430-gcc when compiling assembly. Im > >>> using gcc-3.2.2 with msp430 Ext from the mspgcc/files on Source > >>> Forge gdb-5.1.1 with msp430 Ext from the mspgcc/files on Source > >>> Forge binutils-2.14 Note: I tried binutils-2.15 but it failed to > >>> compile/assembled gcc so I downgraded to 2.14 that seemed to > >>> work. msp430-libc > >>> > >>> im my code I add .section .vectors and describe what all of the > >>> interrupt vectors are by using .org and .word > >>> > >> > >> Sounds comlicated and error prone. Why not just: > >> interrupt(ADC_VECTOR) adc12Isr(void){ blah } or the like? > >> > > I am writing most of my code in assembly. So I don't think I have the > > option of using a snippet that looks like that. > > yes you have, if you let the preprocessor work on your file (i.e. name > it xx.S and feed it to GCC). include signal.h, and give it a > -D_GNU_ASSEMBLER_ on the command line, so that this token is defined > when parsing the include. > the uart_test example uses asm interrupts defined that way. look at > asmlib.S in there. > > > Its a pretty simple > > process, you have .section .vectors which will put your code at Mem > > Addr 0xFFE0 then you add the offset of your interrupt with a .org > > then you use .word to insert the memory address of you ISR. > > you don't show code so it's hard to tell what could have went wrong. are > you sure that you're using .org as it's intended? > > > I should mention I made a makefile from the msp430/Examples, I used > > the assembler files there to base my assembler code on. All of the > > examples are also missing their Interrupt vectors as well. > > uhm, which examples? there are some from us and some converted from TI's > application notes. > > if had a quick look at slac010/fet110_ta01.S which uses .org/.word style > to register interrupts. when i disassemble the binary it looks fine: > > $ msp430-objdump -D fet110_ta01 > > fet110_ta01: file format elf32-msp430 > > Disassembly of section .text: > > 0000f000 <__ctors_end>: > f000: 31 40 00 03 mov #768, r1 ;#0x0300 > > 0000f004 <StopWDT>: > f004: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 > f008: 20 01 > > 0000f00a <SetupTA>: > f00a: b2 40 04 02 mov #516, &0x0160 ;#0x0204 > f00e: 60 01 > > 0000f010 <SetupC0>: > f010: b2 40 10 00 mov #16, &0x0162 ;#0x0010 > f014: 62 01 > f016: b2 40 50 c3 mov #-15536,&0x0172 ;#0xc350 > f01a: 72 01 > > 0000f01c <SetupP1>: > f01c: d2 d3 22 00 bis.b #1, &0x0022 ;r3 As==01 > f020: b2 d0 20 00 bis #32, &0x0160 ;#0x0020 > f024: 60 01 > f026: 32 d2 eint > > 0000f028 <Mainloop>: > f028: 32 d0 10 00 bis #16, r2 ;#0x0010 > f02c: 03 43 nop > > 0000f02e <TA0_ISR>: > f02e: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 > f032: b2 50 50 c3 add #-15536,&0x0172 ;#0xc350 > f036: 72 01 > f038: 00 13 reti > Disassembly of section .vectors: > > 0000ffe0 <_vectors_end-0x20>: > ffe0: ff ff interrupt service routine at 0xffff > ffe2: ff ff interrupt service routine at 0xffff > ffe4: ff ff interrupt service routine at 0xffff > ffe6: ff ff interrupt service routine at 0xffff > ffe8: ff ff interrupt service routine at 0xffff > ffea: ff ff interrupt service routine at 0xffff > ffec: ff ff interrupt service routine at 0xffff > ffee: ff ff interrupt service routine at 0xffff > fff0: ff ff interrupt service routine at 0xffff > fff2: 2e f0 interrupt service routine at 0xf02e > fff4: ff ff interrupt service routine at 0xffff > fff6: ff ff interrupt service routine at 0xffff > fff8: ff ff interrupt service routine at 0xffff > fffa: ff ff interrupt service routine at 0xffff > fffc: ff ff interrupt service routine at 0xffff > fffe: 00 f0 interrupt service routine at 0xf000 > > > chris > > > > ------------------------------------------------------- > This SF.Net email is sponsored by BEA Weblogic Workshop > FREE Java Enterprise J2EE developer tools! > Get your free copy of BEA WebLogic Workshop 8.1 today. > http://ads.osdn.com/?ad_id=4721&alloc_id=10040&op=click > _______________________________________________ > Mspgcc-users mailing list > Mspgcc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/mspgcc-users >