So there is a way to compile and link up to 64K. When I compile for the 2618 it fails to link above 45K (3K for boot code) because of the location of .vectors. The linker file defines .fartext, but it doesn't seem to take advantage of this additional code space. Is there an attribute flag that will specify the location of code to this .fartext region?
Regards, Hugh -----Original Message----- From: Alex Orange [mailto:[email protected]] Sent: Friday, January 23, 2009 3:21 PM To: GCC for MSP430 - http://mspgcc.sf.net Subject: Re: [Mspgcc-users] 64K code limit? Currently mspgcc does not support the MSP430X instruction set. Since 20bit addressing is only available with the MSP430X instruction set there is (at least currently) no way to use 20-bit addressing (and therefore no way around the 64k limit). On Fri, Jan 23, 2009 at 7:53 AM, <[email protected]> wrote: > Hello > > Does anybody went beyond the 64K code space limit of mspgcc in CPU's > that provide more than 64K flash? > > there is a way to translate to 20bit addresses? > > > any hint is welcome > > carles > > ---------------------------------------------------------------------------- -- > This SF.net email is sponsored by: > SourcForge Community > SourceForge wants to tell your story. > http://p.sf.net/sfu/sf-spreadtheword > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users > ---------------------------------------------------------------------------- -- This SF.net email is sponsored by: SourcForge Community SourceForge wants to tell your story. http://p.sf.net/sfu/sf-spreadtheword _______________________________________________ Mspgcc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/mspgcc-users
