On Fri, Feb 17, 2012 at 9:31 AM, Peter Bigot <big...@acm.org> wrote: > Which is why I return to my position that a symbolic address expressed > as a constant should simply put the code-provided constant into the > operand and not muck with it. This *would* permit a round-trip > asm/disasm/asm. What the assembler does now when the symbolic address > is a label is fine, but the constant---no. > > Does anybody else have an opinion? Is anybody else still there?
Well, I tried to follow this discussion and I feel like a chimpanzee in the opera---you guys have deep knowledge of the issues and I just have some general understanding. I have two thoughts on this: First, I got the impression that this is not coming up in the context of compiler-generated C/C++; correct me if I am wrong but I believe that you can go from C to binary, disassemble it and reassemble back to the original binary, without encountering this issue (of course excluding manual asm() segments). If that's the case, then this issue is of relatively small import, significant only for deep system-like code and hacks---so of course it's worth getting right but not tragedy if not perfect. Second, can something be gained by looking at the bit-level instruction encoding and trying to guess the low-level implementation and match its intent? I bet that these chips have a fairly low transistor budget and some quirks may be simply due to shortcuts in implementing the logic (for instance, the fact that PC-relative offsets refer to post-fetch value, PC+2). Given that I have a (perhaps mistaken) impression that these issues are important to assembly hackers but not to people writing C, it may be OK to forego cute assembly tricks that simplify some underlying ugliness, and simply require writing a direct representation of binary-level instruction encoding, with the niceties handled by macros and/or linker. On other architectures, I have been bitten many times by assembler trying to be cute (instruction reordering for delay slots on RISC chips, automatic selection of short/long form of branches, etc). I want my compiler to be super smart, and my assembler to do exactly what I tell it to. ------------------------------------------------------------------------------ Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ _______________________________________________ Mspgcc-users mailing list Mspgcc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mspgcc-users
