On 03/09/2012 00:10, William "Chops" Westfield wrote: > AVR has > http://www.nongnu.org/avr-libc/user-manual/group__util__atomic.html > > As far as I know, it just inserts appropriate disable/reenable > interrupt instructions. > > Globally disabling interrupts tends to be cheap on microcontrollers, > and of course it's much easier than trying to get the optimizer to > search for a single instruction that might not exist. > > Perhaps the optimizer can discard the DINT/EINT instructions if they > end up surrounding a single instruction; that seems like it would be > standardish peephole optimization, though at a rather low-level... > > BillW > >
Yes, the AVR "atomics" are exactly about disabling interrupts around a block of instructions (like mspgcc's "critical" function attribute). There is no way a peephole optimiser could change a DINT/<opcode>/EINT set. The set of instructions has a different effect from the <opcode> on its own - namely it also enables interrupts. So it would not be a valid optimisation. And anyway, most such sequences are not that simple - they consist of storing the current interrupt state, disabling interrupts, doing the operation, then restoring the interrupt state. ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ Mspgcc-users mailing list Mspgcc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mspgcc-users
