On Tue, 25 Apr 2000, Daniel Jorge Caetano wrote:
> On Tue, 25 Apr 2000 03:59:01 PDT, amnon loeza wrote:
>
> >Features:
> >* Z80, Z180 compatible
> >* 20MHz, 20 MIPS
> >* 1MB memory, 64k I/O
> >* two 16-bit timers
> >* MMU
> >* add. instructions: TST TSTIO MLT
> >The AB181E-20 microprocessor has an additional fixed math accelerator.
> >Anyone familiar with this CPU? Could this be a third alternative?
A quote from the manufacturer's web page:
"This device does not support Z80 peripherals or interrupt mode 2, but is
otherwise code compatible to the Hitachi HD64180 and the Zilog Z180 device."
But the introduction in the data sheet (ab180-20.pdf) suggests exactly the
opposite:
"Not all Z80 interrupt modes are supported. The AB180-20 uses interrupt
mode 2 only. The interrupt mode instructions are treated as NOPs. Z80
interrupt acknowledge cycles are not generated."
In the chapter out interrupts things become a bit clearer.
If I interpreted it correctly, it's like this:
- INT0 always causes a jump to #0038 (IM1 behaviour)
- INT1 and INT2 use a vector mechanism, but not like IM2:
they use a 32-byte there the mapping from interrupt source to
table index is fixed and not specified on the bus like IM2
For MSX this means that IM2 is not available. Neither is IM0, but that
was unused anyway.
Another incompatiblity with Z80:
"The Z80 has some undocumented instructions, such as being able to load the
upper or lower 8 bits of the index register (IY and IX) independently.
This was used by a handful of programs, especially some "copy protected"
code. The AB180-20 does not support all of the undocumented Z80
instructions."
But Z180 doesn't have IXH/IXL instructions either, right?
This may be a serious one:
"The on-chip register addresses are located in the I/O address space from
0000H to 00FFH (16-bit I/O addresses). In order to access the on-chip I/O
registers (using I/O instruction), the high-order 8 bits of the 16-bit I/O
address must be 0."
This means the MSX I/O ports will be inaccessable if the high-order 8 bits
happen to be zero. Those high-order bits come from one of the registers,
right? I thought it was B, but Laurens said A. Anyway, the value of that
register is unknown in MSX programs.
By the way, the DMA on this processor looks real cool. It can also perform
DMA from memory to I/O and vice versa. It could be used for example to
upload samples to the MoonSound or Music Module.
Bye,
Maarten
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