Hello, The PC/SC v2 part 10 specification changed regarding the byte ordering of fields in PIN_VERIFY_STRUCTURE and PIN_MODIFY_STRUCTURE structures.
Version 2.01.6 from December 2005 contains: "Detailed information about each structure element can be found in [4]." (page 5 and 6). Reference [4] is the CCID specification and this CCID specification writes "Fields that are larger than a byte are stored in little endian." (page 9). Version 2.02.05 from December 2008 contains: "Byte ordering is decided by machine architecture." (page 4). Little endian systems (i386, amd64) are safe here since the machine architecture ordering is also the little endian ordering used by CCID. The problem is for big endian systems (PowerPC). In pcsc-lite I defined two macros HOST_TO_CCID_16() and HOST_TO_CCID_32() to correctly set the CCID fields used by the application (like in the scardcontrol.c example [1]). But these macros should now be NOT used and the CCID driver should be modified to use the macro internally when converting the PC/SC PIN_VERIFY_STRUCTURE to the CCID PC_to_RDR_Secure structure. This change to the CCID driver would break the binary interface. I do not see any (portable) way to check if the driver is following version 2.01.6 or 2.02.05 of the PC/SC spec. I have no real idea how to handle that change. Should I just update the CCID driver to follow the latest PC/SC specification and break already deployed applications? Any comments or ideas? Thanks [1] http://svn.debian.org/viewsvn/pcsclite/trunk/Drivers/ccid/examples/scardcontrol.c?rev=3356&view=auto -- Dr. Ludovic Rousseau _______________________________________________ Muscle mailing list [email protected] http://lists.drizzle.com/mailman/listinfo/muscle
