On Aug 7, 9:21 pm, Quixotic Nixotic <[email protected]> wrote:
> In fairness, and if my memory is correct, Nicko, our chief moderator, > suggested that driving a FET from a PIC output could stress the PIC > output gate in ways a PIC didn't ought to be stressed and that > current sensing and back EMF diodes should be incorporated. I am not > the right person to speak about such things but I for one would > appreciate a lesson from the experts in this group on such a topic. Its one of those cases where you may well get away with it for years, or you may not! Due to internal capacitances inherent in all transistor types, negative going pulses will be induced onto the gate of the driving FET when it turns on or off. When generating 40V or so for a VFD, this is not generally an issue, but when generating 180V for nixies, these can be many volts below GND. PICSs and AVRs are generally not good at handling these incursions, so the addition of a small diode between the gate and ground (cathode to the gate) will protect the uP port - this is not the same as the ESD protection most (not all) uP ports have. Nick -- You received this message because you are subscribed to the Google Groups "neonixie-l" group. To post to this group, send an email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/neonixie-l?hl=en-GB.
