Greg, I'd like to understand this so I can do the same for the IN-18 design 
and the next, fifteen digit clock that will use five, HV5530s. Please let 
me know if this is correct:

Latch, blanking, and data, are connected in parallel, on each of your 
boards. Each clock line is connected to a separate pin on the processor. 
How do you clock the data so that it moves across all HV5530s if they are 
not clocked at the same time? 

Would it be an advantage to connect each clock and each data line to a 
separate pin, to load each HV5530 separately rather than serially?






On Wednesday, September 2, 2015 at 2:17:17 AM UTC-4, gregebert wrote:
>
> Once I finish the clock (a few months from now, I hope...) and post a 
> video, I'll probably give copies of my design report to people in this 
> forum who request it.
>
> Each of my display boards has two HV5530 devices that are connected in 
> series, but I have separate clock signals in order to guarantee hold-time 
> margin by using a 2-phase clock. When multiple display boards are used (for 
> more than 6 tubes), they each have their own separate serial-data-in 
> signal. All other signals are shared in-common. 
>
>
>

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