There are two ways of doing this. One is the way you suggested, but it
takes more wires. The more common way is to connect the data out line
from one chip to the data in line to the next. Then you clock all 80
bits into the string of chips and hit the common latch pulse once.
On 10/17/15 6:26 AM, Mitch wrote:
Hi All,
The seven digit, IN-18 board is on order so I'm on to the next project, a
fifteen digit Union Square Metronome type clock similar to Jarek's clock
here:
http://hackaday.com/tag/metronome/
Four HV5530s will be connected in series and updated every second, driving
twelve Nixies. That should not be a problem. One HV5530 will update two,
1/10 second, and one, 1/100 second Nixie, updated at 10ms.
All five will have the blanking lines connected together, to a PWM pin.
That leaves Data, Clock, and Latch, and only two extra level shifters are
available on the CD4054B.
My thought is that only the latch line on the four HV5530s needs to be
separated from the latch line on the single, fifth HV5530 because even
though the data will be presented and clocked to all five HV5530s, if it is
never latched and subsequently replaced with it's correct data, incorrect
data will never latch to the wrong display.
With two available level shifters and pins available on the 1284P, clock
and latch could be separated, but I'm not sure if separating the clock line
too, will make a difference.
Please give me advice on this.
By the way, the cost estimate for the seven digit, IN-18 board from OSH
Park was just over $210 for three boards, with shipping. I decided to try
PCBWay this time because their estimate was $70 with DHL shipping for five
boards.
Thanks.
--
David Forbes, Tucson AZ
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