I'm always paranoid about ESD, so I would suggest removing tubes before testing them with something that generates an e-field. Most, but not all, CMOS devices have limited ESD protection that is intended to protect the device during assembly; certainly not for deliberately-induced charge.
If out-of-circuit testing is not possible, then I would leave the clock energized and try touching against the tube's envelope. I believe that a powered-on device will shunt induced charge better than when unpowered. I think the risk of ESD-induced latchup in the driver IC is minimal, because you wont be touching the circuit with a charged device, only the tube's envelope. -- You received this message because you are subscribed to the Google Groups "neonixie-l" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/neonixie-l/aab49ba8-d5de-4a65-896a-4ae143704e42%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
