Continuing the discussion on this old thread... My 24 digit binary clock design had two, HV5530s separated by 12". The first in the data series worked perfectly, but the second would not because of too much noise on the data line. I had two unused level converters on the CD4504 so I separated data and clock for each HV5530, and everything worked perfectly.
Now I just went back to my old, 15 digit Metronome clock that I'm going to update with Wifi LEDs, etc. It uses five, HV5530s. For that design I separated the latch and clock, one set controlling two HV5530s, and the other, three HV5530s, with the data line in series between all five. Although it works perfectly, today it doesn't seem to make sense. What I should have done is to separate data and clock, not latch and clock, three HV5530s on one set of outputs from the microcontroller, and two HV5530s on another set of outputs. Please let me know your thoughts on this. I'm working on the update now. Thanks. -- You received this message because you are subscribed to the Google Groups "neonixie-l" group. To unsubscribe from this group and stop receiving emails from it, send an email to neonixie-l+unsubscr...@googlegroups.com. To post to this group, send an email to neonixie-l@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/neonixie-l/2b6324b8-18e8-486d-b730-ff7b2af41a41%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
