Hi Andrew,
Andrew Lunn <[email protected]> writes:
>> if (reg == MII_PHYSID2 && (*val & 0xfff0) == 0)
>
> This should be 0x3f0. There are 10 bits for the device model, of which
> Marvell uses the lowest 4 for version.
>
>> *val |= chip->info->prod_num << 4;
>
> #define PORT_SWITCH_ID_PROD_NUM_6190 0x190
> #define PORT_SWITCH_ID_PROD_NUM_6190X 0x0a0
> #define PORT_SWITCH_ID_PROD_NUM_6191 0x191
> #define PORT_SWITCH_ID_PROD_NUM_6290 0x290
> #define PORT_SWITCH_ID_PROD_NUM_6390 0x390
> #define PORT_SWITCH_ID_PROD_NUM_6390X 0x0a1
>
> That still gives us 6 different PHY IDs, and the shift will cause is
> to modify the OUI, so it is no longer a Marvell OUI.
OK, this is fine with the Marvell mask then. Can you move the check in
the higher mv88e6xxx_phy_read() function when you respin please?
Thanks!
Vivien
