[email protected] (Niels Möller) writes: > Another question: We need some kind of memory barrier when writing > and/or reading the initialized flag. The (unlikely) failure case is a > thread reading the initialized flag, getting 1, and then reading one of > the function pointers, and getting a too old value.
After discussing this on another forum, I've been told that the x86 architecture is strongly ordered (as long as one doesn't use certain instructions, like "non-temporal store"). So a plain store to a volatile int should to, with no memory barriers. Case of ARM will be different, since it has a weaker memory model. See also http://lwn.net/Articles/252110/ Regards, /Niels -- Niels Möller. PGP-encrypted email is preferred. Keyid C0B98E26. Internet email is subject to wholesale government surveillance. _______________________________________________ nettle-bugs mailing list [email protected] http://lists.lysator.liu.se/mailman/listinfo/nettle-bugs
