[email protected] (Niels Möller) writes: > I've pushed a start for fat binary support on arm.
And now some more, including choice between C and neon implementations (currently there's neon code for salsa20, sha512, sha3, and umac). Testing appreciated. I haven't done the memory barrier thing yet, it appears to be more complicated than I had hoped. The manual I have say that the dmb instruction (data memory barrier) is available only with armv7 and later. And that armv6 uses writes to CP15 registers (I haven't yet tried to figure what that means out, or if this method works also on later versions). For pre armv6, maybe memory was strongly ordered, or there where no multi-processor support at all? So it seems we may need some arch type detection to find out if and how to do a memory barrier! I've had a quick look at what linux does (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/include/asm/barrier.h), and it seems messy. I wonder if there's some different approach to get C compiler, C library or the kernel do a memory barrier for us? I'd prefer to not link with any thread libraries. Regards, /Niels -- Niels Möller. PGP-encrypted email is preferred. Keyid C0B98E26. Internet email is subject to wholesale government surveillance. _______________________________________________ nettle-bugs mailing list [email protected] http://lists.lysator.liu.se/mailman/listinfo/nettle-bugs
