On 24.11.22 10:35:43, Dan Williams wrote:
> From: Terry Bowman <terry.bow...@amd.com>
> 
> ACPI includes a CXL _OSC for the OS to communicate what it knows of CXL
> device topologies. To date Linux has added support for CXL 2.0 (VH) port
> topologies, hotplug, and error handling. Now that the driver also know
> how to enumerate CXL 1.1 (RCH) port topologies, indicate that capability
> via CXL _OSC. See CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support
> Field'
> 
> Signed-off-by: Terry Bowman <terry.bow...@amd.com>
> Signed-off-by: Robert Richter <rrich...@amd.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
> [djbw: wordsmith changelog]
> Signed-off-by: Dan Williams <dan.j.willi...@intel.com>

I have had a reworded version of this in the pipe too, esp. version
strings were dropped in favor of VH and RCD mode. You might want to
consider that one:

-- >8 --

>From 260e04d5d34c6d37a1866b73a5e229d1ceddf272 Mon Sep 17 00:00:00 2001
From: Terry Bowman <terry.bow...@amd.com>
Date: Mon, 14 Nov 2022 10:03:30 -0600
Subject: [PATCH v5] cxl/acpi: Set ACPI's CXL _OSC to indicate RCD mode support

ACPI uses the CXL _OSC support method to communicate the available CXL
functionality to FW. The CXL _OSC support method includes a field to
indicate the OS is capable of RCD mode. FW can potentially change it's
operation depending on the _OSC support method reported by the OS.

The ACPI driver currently only sets the ACPI _OSC support method to
indicate CXL VH mode. Change the capability reported to also include
CXL RCD mode.

[1] CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support Field'

Signed-off-by: Terry Bowman <terry.bow...@amd.com>
[rrich...@amd.com: Reworded patch description.]
Signed-off-by: Robert Richter <rrich...@amd.com>
---
 drivers/acpi/pci_root.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 4e3db20e9cbb..b3c202d2a433 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -493,6 +493,7 @@ static u32 calculate_cxl_support(void)
        u32 support;
 
        support = OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT;
+       support |= OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT;
        if (pci_aer_available())
                support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT;
        if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
-- 
2.30.2


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