On Fri, 18 Mar 2005 14:39:04 -0500, Daniel Phillips <[EMAIL PROTECTED]> wrote:
> > The PIO registers aren't in card memory, they are on the FPGA. Also, we > haven't yet specified how you provide the target DMA address for the card's > memory. If we want, we can restrict the possible destination addresses in > the card memory. The card itself doesn't have to provide any support for > this because the DMA is being submitted via ioctl to our kernel driver > anyway, and we can provide security checks there. That said, I doubt > anybody will get around to this for a while, nor is it important in order > to get something up and running. I'm starting to realize that the distinction between the kinds of commands that are allowed for direct and indirect might have to be more explicit. Allowed in direct: - Engine render commands - Memory copy commands (host to GPU/GPU to host) - Commands to load indirect Allowed in indirect: - Engine render commands _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
