On Thu, 24 Mar 2005 11:32:51 -0500, Andr� Pouliot <[EMAIL PROTECTED]> wrote: > What we could do is pick a name for the chip right now. Then when it > come to name the card your going to be selling, we could stick with the > same name or change it. And yes I do have also a soft spot for > "harbinger" as name. :) > > A the same time I have a question for Timothy. Would it be possible to > put also a PCI-E interface, with the PCI, to the chip when it will be > made into an ASIC? Because as I see it the big performance limiting > factor is actually the PCI interface, also with a PCI-E 2X we augment > the bandwith by aproximatly 2 or 3. Also you could make 2 different card > with one chip and depending on the yield process I suppose at the > beginning the PCI-E interface will be more buggy but the die could still > be used as a PCI card, As time pass it will become with lower defect > rate and the protocol PCI-E at that time will be more used.
My desire, due to the need for pin sharing, is to integrate into the same state machine a number of different interfaces, including PCI, AGP, PC/104, and some others used in embedded systems. On top of that, I intend to integrate a simplified "local bus" that we can use to interface with external interface logic, such as a PCI Express bridge chip. From that we'll get full performance, and the latency won't matter much since we'll seldom do PIO reads for anything but the trivialest things. Things may change depending on what technology is available at the time for an ASIC. The issue is that PCIe is so fundamentally different, at the signal level, from everything else, that it will require its own separate interface, one way or the other. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
