On 5/16/05, Jack Carroll <[EMAIL PROTECTED]> wrote: > On Sun, May 15, 2005 at 09:43:27AM -0400, Timothy Miller wrote: > > > > Adding chips always costs money. But we (the users) will come up with > > some LGPL processor cores for this thing, for fun. > > That answers one of my questions. I was thinking about ways of > implementing a piggyback board as an optional accessory to convert the unit > to fixed-frequency video (later, when there's attention to spare for that). > If we build an SPI port into the HDL, it just needs to be brought out to a > 6-pin header. The piggyback board could consist of nothing but jumper > headers and the shift registers to read them in. If the core interrogates > the SPI port and gets back anything other than all-1s, it reads the mode > from the SPI bit string, and disables mode commands from the host. > Mind you, actually writing the HDL for the SPI feature could be left > until very late. That's the beauty of field programmability. All it would > take to preserve this option is to assign the FPGA pins, and include the > site for the header and the holes for the piggyback mounting hardware when > the board is laid out. > What do you think, Tim? Should there be an SPI port just on general > principles?
I feel like I should know what SPI is, and it sounds familiar, but I can't place it right off. Give me some details, and I'll see what I can do. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
