Timothy Miller wrote:
> I'm trying to finish up PCI. There are a couble of things I need that
> I don't know how to do off the top of my head: Program the Xilinx and
> reprogram the PROM.
I don't know if any of this will be useful:
What we do here on our development boards is to have a PROM that's
connected to the Spartan-3 with the FPGA in master serial configuration
mode (so it gets automatically configured on start up).
/======\--->---/======\
| PROM | | FPGA |
\======/---<---\======/
The Spartan-3 and ROM also form a JTAG chain [1] (apologies for appalling
ASCII art):
/======\ /======\
--->-------| PROM |--->---| FPGA |----\
---<---\ \======/ \======/ |
| |
\------<--------------<--------/
So we can always configure the FPGA without touching the ROM and vice
versa, which is really useful in the "poke things until they work" stage
of design.
Anyway, what I'm getting at is: how about writing a PCI to boundary scan
interface? It seems like the elegant solution to me...
Peter
[1] You can always configure a Spartan-3 by JTAG no matter what the
settings of the M(0..2) mode pins are.
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