On 10/20/05, Sebastien & Cathy <[EMAIL PROTECTED]> wrote: > Hello, > > I've subscribed to the mailing list a week ago. I'm a French FPGA/ASIC > design engineer and I have some experience in PCI/PCI-X protocols, > verilog, vhdl. > I've already designed PCI and PCI-X interfaces using the Xilinx > Logicore IP and I would like to get involved in this project. > I've retrieved the subversion database. I do have some questions however... > > 1. What should I read for specifications? Is there an architecture > already done for the fpga?
There is some architecture done, but it doesn't apply to the PCI core. I can give you a general idea of what I'm going for, but what I've been trying to do lately is formally define the architecture of the Lattice portion of OGD and diagram it out in detail. We just haven't yet chosen a tool for representing it. If you could help with that part, it would be great. We can review its present design and go over the needs. After diagramming it out, we could even split the work. At the very least, if you can help me architect it, I can code it more efficiently. > 2. There is not much verilog in the database. Does that represent the > current status of the project? Of OGD, yes. OGA has the GPU defined in detail, but it's not in Verilog. > 3. Is there an #IRC channel? Yeah. Freenode.net, #opengraphics, IIRC. > A plus tard. A bien tot. :) (I forget what that means. I hope it means something good.) Thank you for joining us. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
