Hello,

Thanks everybody for welcoming me.

Tim:

There is some architecture done, but it doesn't apply to the PCI core.
 I can give you a general idea of what I'm going for, but what I've
been trying to do lately is formally define the architecture of the
Lattice portion of OGD and diagram it out in detail.  We just haven't
yet chosen a tool for representing it.
  
I've read your article in kerneltrap. Regarding the PCI-X core. Why are you using a 32-bit interface? A 64-bit PCI-X card fits in a 32-bit connector. I think, we can design the interface able to  switch from 64 to 32 bit if required.
Are you using some verilog code from www.opencores.org? I think they have a fully functionnal PCI core and some other interesting IPs...
If you could help with that part, it would be great.  We can review
its present design and go over the needs.  After diagramming it out,
we could even split the work.  At the very least, if you can help me
architect it, I can code it more efficiently.

  
Ok. I'm ready to help but I don't know where to get the info from. As I said, I have some experience in PCI but I may be helpful in any other digital part of the project.
What do you want me to review?

  
2. There is  not much verilog in the database. Does that represent the
current status of the project?
    

Of OGD, yes.  OGA has the GPU defined in detail, but it's not in Verilog.
  
Anything you can show me about the GPU? in which language is it written?
Do you have a schematic of the board?
  
3. Is there an #IRC channel?
    

Yeah.  Freenode.net, #opengraphics, IIRC.
  
Do you connect often?
  
A plus tard.
    

A bien tot.  :)

(I forget what that means.  I hope it means something good.)
  
Means the same. Good shot.

Thank you for joining us.


  

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