On Mon, 28 Nov 2005 10:51:29 +0100
Daniel Rozsnyó <[EMAIL PROTECTED]> wrote:
> If the FPGA is enough powerfull to decode 1080i MPEG2 (is it?), then the
> speed of PCI is not a bottleneck.. (or at least not for me)
If you mean iDCT, yes that would be possible, if we add a
few commands that help to perform iDCT. But be aware that
MPEG (or any other of the current video codecs) are not
finished after the iDCT, but you also have to perform a
motion compensation. As far as i know, noone of the cards
that support iDCT in hardware support also motion compensation
in hardware. Thus, the host cpu has to perform the motion compensation
somehow, either in video memory oder in host memory.
(yes, that's trading cpu cycles with io bandwidth)
I have never looked at this, but i do not think that we should
waste the space we have on the FPGA for either iDCT or
motion compensation. Most CPUs these days are fast enough
to perform iDCT fast enough that there is no advantage
in doing it on a card. And doing motion compensation
in hardware would be IMHO quite expensive (logic wise).
Attila Kinali
--
wer soviel schoggi isst, kann sowieso nicht dumm sein ;-)
-- Sandra
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