On Fri, Mar 17, 2006 at 11:41:09AM -0500, Timothy Miller wrote:
>
> There's another interesting point that you bring to light. The lower
> bits are grounded. If we can only afford the 8 bits from the FPGA, it
> would be technically better to connect the lower two bits to the same
> signals as the highest two bits.
I don't think so. Driving 3 inputs together would result in a
memory LSB weight of 7, while the next higher bit would have a weight of 8.
We'd want each bit to have twice the weight of the next lower bit, and this
wouldn't do that.
So if there aren't enough pins available, the best choice is to zero
the unused DAC LSBs, as you planned.
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