On 6/16/06, Vinicius Santos <[EMAIL PROTECTED]> wrote:
Even though it sounds silly, I was trying to play around with
constructing a simple async memory. So I build this module:
[snip]
But I got the following output when executing a.out:

0 write=1 read=0 addr=0003 in=ff00 out=xxxx
1 write=0 read=1 addr=0003 in=ff00 out=xx00

I assume those 'x' means 'Don't Care',  but why am I getting those?
It's even strange because it sets 0 accordingly.

This one stumped me for a couple minutes.  It wasn't until I tried
changing around the mem module did I realize what was going happening.

All variables are initialized as X if unassigned, which means
invalid/conflict.  (Don't care is in the verilog syntax, but uses a
dash '-')

I thought that meant the memory was only writing the lower 8-bits or
reading back the lower 8-bits.

But I traced the problem to this line:
   wire [15:0] out = 0;

Outputs aren't usually initialized.  What's happening is there are two
assignments (drivers) to the 'out' wire.  It should be:

wire [15:0] out;

To pseudo-code what was happening in the testbench:

assign out = 0
assign out = memory_out;

If done physically, two wires are connected to each bit the 'out'
wire.  A set of ground wires and the set from the memory.

When you run the testbench, you get the following:
0 write=1 read=0 addr=0003 in=ff00 out=xxxx
1 write=0 read=1 addr=0003 in=ff00 out=xx00

At time 0, out is XXXX because it's unassigned.  That's expected.
At time 1, the memory module tries to assign output to 'hff00.  but
the '= 0' assignment tries to force it to 'h0000.

The simulator doesn't know how to resolve the two.  The top 8-bits are
assigned a 1 and a 0 at the same time so the sim assigns it an 'X'.
The bottom 8-bits are assigned a 0 and a 0, so it's easy to for the
sim to resolve: 0.

If you now go back to look at time 0, it's actually 0 and X on each
wire, which resolves to X because X and anything is X.

Hope that helps.  Changing that one line should fix the output to:
0 write=1 read=0 addr=0003 in=ff00 out=xxxx
1 write=0 read=1 addr=0003 in=ff00 out=ff00

Ryan
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