On 7/23/06, Patrick McNamara <[EMAIL PROTECTED]> wrote:
One last question. Does the video controller expect little endian or big?
The program memory is basically big-endian, if you want to say that it has endianness. Ultimately, although I may not have done it right in the prototype, the video controller will be little-endian down to the bit level. Bit zero is on the left. Why? WAY easier to write Verilog code to process pixels that way. Well, at least it was for TROZ. Maybe since OGA is 32-bit only, we won't do it that way. Just thinking.... _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
