On 8/3/06, Koen De Vleeschauwer <[EMAIL PROTECTED]> wrote:
Correct me if I'm wrong, but I only see three possibilities: - using an external PLL. I see no external PLL in the schematic, however. - using a PLL in another chip on the board, eg. the Conexant. CLKO of the Conexant seems unconnected, however. - or reloading the FPGA with a different bitstream whenever the modeline dotclock changes. Which do you use?
I think we might be using a PLL inside of the XP10. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
