On 8/20/06, Jon Smirl <[EMAIL PROTECTED]> wrote:
On 8/20/06, Timothy Miller <[EMAIL PROTECTED]> wrote:
> The only problem I haven't totally resolved yet (in any case) is that
> while DMA is going on, you really don't want to try to do a PIO to the
> same device. This isn't a logical problem so much as a physical one.
> During the transfer of a DMA burst, the bus is tied up doing
> something, and it's going to be doing it for a while. Any attempt by
> the CPU to access the bus is going to suffer a massive latency.
> Imagine how many CPU cycles are wasted while waiting for 32 PCI bus
> cycles at 33MHz.
In command stream mode the Radeon chips don't need to do any PIO. You
put commands in the command stream that write to the same registers.
It is a somewhat general mechanism, commands can write 1,2,3,4,5, etc
registers. Command blocks contain pairs of register numbers and
values.
If you have submitted a bunch of GPU commands (because you didn't have
any more to submit), and then part way through the process of DMAing
those commands, you decide you want to send more, how do you tell the
GPU to fetch those new commands?
DMA to/from the cards is overrated. Most apps load their textures into
the card and then never use DMA again. DX10 specs virtual VRAM which
eliminates even more need for programmed DMA. Only a few apps read
textures back from the card.
I'm concerned rather less about image loads (although I want to use
DMA for that too) than I am about using DMA to send rendering
commands, because I don't want to keep the CPU busy during the
relatively slow process of transferring commands across the bus. I
want the CPU busy doing something unrelated, another thing that will
give us an advantage over other cards.
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