Dieter wrote:
What bus interface is the card going to have? PCI is hopelessly
slow for graphics.
It depends on what you are sending over the bus. AGP was designed
to rapidly access system memory so that it could be used for
graphics memory. Having a lot of memory on the video board tends
to negate this need. We could use 64 bit @ 66 MHz.
Very few machines that the OGC would go into have PCI-X.
64 bits @ 66 MHz isn't PIC-X it is double speed double wide PCI. IIUC,
PCI-X is faster
So you only get "plain" PCI. And you have to share that 133 MBps
with the other PCI devices.
>
And lots of machines have other important high-bandwidth devices on
the PCI bus.
That's fine for mostly static things like most desktop apps. Email,
spreadsheet, image viewer, most web browser use, ...
Newer machines have more than one PCI bus.
But many (most?) users are going to want to be able to watch video.
OGC is supposed to support 2 dual-link displays. Last I read, OGC is
not going to have an mpeg decoder, and even the hw scaler has been
dropped. Even if the CPU is fast enough (most will not be), and even
if you give 100% of the PCI bus to the OGC (not realistic), and only
driving 1 display, the bits just don't fit.
There are machines out there that have only 32 bit PCI @ only 33 MHz and
that isn't fast enough for HDTV although it is fast enough for 480i
(pixel clock 14,3325 MHz @ 60 fields/s [actually slightly slower]). It
would be pushing it with 480p.
What to do?
a) Don't support video (lost sales to anyone who wants/needs video)
b) Switch to PCI-e (lost sales to PCI-only and PCI&AGP systems, still
need a very fast CPU)
I think that we should be able to offer the video card in AGP, PCI,
PCIe, & HTX. This would be best accomplished by having the interface in
a separate chip.
c) Include a mpeg decoder and hw scaler (chip is more complex to
design, larger and more expensive)
The hardware scaler is only needed for analog TV so it could be external
but on chip would be better. The MPEG decoder doesn't need to be on
chip, but it should be possible to have it on the board.
d) Include a separate decoder chip. (If there is one that is
documented, and is usable with the architecture.)
It could just be a CPU chip doing it in software.
--
JRT
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